82 lines
3.8 KiB
Go
82 lines
3.8 KiB
Go
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// Copyright (c) 2026 Petr Balvín <opensource@petrbalvin.org> (https://petrbalvin.org)
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// SPDX-License-Identifier: BSD-3-Clause
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package arch
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import "fmt"
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func buildLOONG64() *Table {
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return newTable(LOONG64, loong64Registers(), relaxCounts(mergedInstrs(loong64Summaries(), commonGeneratedInstrs, loong64GeneratedInstrs, loong64Aliases())))
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}
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// loong64Aliases are branch spellings the assembler front-end accepts in
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// addition to the generated opcode table (notably JAL, BFPF and BFPT).
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func loong64Aliases() []string {
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return []string{"JAL", "BFPF", "BFPT"}
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}
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func loong64Summaries() map[string]Instr { return toMap(loong64Curated()) }
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// loong64Registers builds the LoongArch (loong64) register file: 32 integer
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// (R), 32 floating-point (F), and the LSX/LASX SIMD vector registers (V and X).
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func loong64Registers() []Register {
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var regs []Register
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add := func(name string, class RegClass, desc string) {
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regs = append(regs, Register{Name: name, Class: class, Desc: desc})
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}
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for i := 0; i <= 31; i++ {
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add(fmt.Sprintf("R%d", i), GPR, "integer register")
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}
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for i := 0; i <= 31; i++ {
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add(fmt.Sprintf("F%d", i), Float, "floating-point register")
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}
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for i := 0; i <= 31; i++ {
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add(fmt.Sprintf("V%d", i), VecARM, "LSX 128-bit vector register")
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}
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for i := 0; i <= 31; i++ {
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add(fmt.Sprintf("X%d", i), VecARM, "LASX 256-bit vector register")
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}
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return regs
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}
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// loong64Curated is a hand-written subset of common LoongArch instructions
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// carrying summaries. The authoritative, complete set is loong64GeneratedInstrs.
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func loong64Curated() []Instr {
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return []Instr{
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ic("ADD", "Integer add (word)", 3, 3), ic("ADDW", "Add word", 3, 3),
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ic("ADDD", "Add doubleword", 3, 3), ic("ADDI", "Add immediate", 3, 3),
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ic("SUB", "Subtract (word)", 3, 3), ic("SUBW", "Subtract word", 3, 3),
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ic("SUBD", "Subtract doubleword", 3, 3),
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ic("AND", "Bitwise AND", 3, 3), ic("ANDI", "AND immediate", 3, 3),
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ic("OR", "Bitwise OR", 3, 3), ic("ORI", "OR immediate", 3, 3),
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ic("XOR", "Bitwise XOR", 3, 3), ic("XORI", "XOR immediate", 3, 3),
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ic("NOR", "Bitwise NOR", 3, 3),
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ic("MUL", "Multiply (word)", 3, 3), ic("MULW", "Multiply word", 3, 3),
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ic("MULD", "Multiply doubleword", 3, 3),
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ic("DIV", "Divide (word)", 3, 3), ic("DIVW", "Divide word", 3, 3),
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ic("DIVD", "Divide doubleword", 3, 3),
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ic("MOD", "Modulo (word)", 3, 3), ic("MODW", "Modulo word", 3, 3),
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ic("MODD", "Modulo doubleword", 3, 3),
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ic("SLL", "Shift left logical", 3, 3), ic("SRL", "Shift right logical", 3, 3),
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ic("SRA", "Shift right arithmetic", 3, 3), ic("ROTR", "Rotate right", 3, 3),
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ic("SLT", "Set if less than", 3, 3), ic("SLTU", "Set if less than unsigned", 3, 3),
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ic("SLTI", "Set if less than immediate", 3, 3),
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ic("LD", "Load doubleword", 2, 2), ic("LDW", "Load word", 2, 2),
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ic("LDH", "Load halfword", 2, 2), ic("LDB", "Load byte", 2, 2),
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ic("ST", "Store doubleword", 2, 2), ic("STW", "Store word", 2, 2),
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ic("STH", "Store halfword", 2, 2), ic("STB", "Store byte", 2, 2),
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ic("BEQ", "Branch if equal", 3, 3), ic("BNE", "Branch if not equal", 3, 3),
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ic("BLT", "Branch if less than", 3, 3), ic("BGE", "Branch if greater or equal", 3, 3),
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ic("BLTU", "Branch if less than unsigned", 3, 3), ic("BGEU", "Branch if greater or equal unsigned", 3, 3),
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ic("B", "Unconditional branch", 1, 1), ic("BL", "Branch with link", 1, 1),
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ic("JIRL", "Jump indirect with link", 1, 3),
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ic("RET", "Return", 0, 1), ic("NOP", "No operation", 0, 1),
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i("SYSCALL", "System call"), i("BREAK", "Breakpoint"), i("DBAR", "Barrier"),
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ic("FADDS", "FP add (single)", 3, 3), ic("FADDD", "FP add (double)", 3, 3),
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ic("FSUBS", "FP subtract (single)", 3, 3), ic("FSUBD", "FP subtract (double)", 3, 3),
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ic("FMULS", "FP multiply (single)", 3, 3), ic("FMULD", "FP multiply (double)", 3, 3),
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ic("FDIVS", "FP divide (single)", 3, 3), ic("FDIVD", "FP divide (double)", 3, 3),
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ic("MOV", "Move register", 2, 2),
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}
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}
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