feat(arch): the same-size shift-immediate family
Assisted-by: GLM 5.3 Flash
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@@ -994,6 +994,16 @@ func TestArm64AssembleExtensionShiftImmGolden(t *testing.T) {
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{"ZSQSHRNT $16, Z5.D, Z4.S", 0x457024a4},
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{"ZSSHLLB $0, Z3.B, Z2.H", 0x4508a062},
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{"ZSQSHL $20, Z8.S, P4.M, Z8.S", 0x04469288},
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// The same-size right shifts, the accumulator and the extract.
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{"ZSRI $6, Z7.D, Z23.D", 0x45daf0f7},
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{"ZSSRA $6, Z7.D, Z23.D", 0x45dae0f7},
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{"ZUSRA $6, Z7.D, Z23.D", 0x45dae4f7},
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{"ZSRSRA $6, Z7.D, Z23.D", 0x45dae8f7},
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{"ZURSRA $6, Z7.D, Z23.D", 0x45daecf7},
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{"ZASR $6, Z7.D, Z23.D", 0x04fa90f7},
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{"ZASR $6, Z23.B, P1.M, Z23.B", 0x04008557},
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{"ZASRD $6, Z23.B, P1.M, Z23.B", 0x04048557},
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{"ZXAR $6, Z23.B, Z21.B, Z21.B", 0x042a36f5},
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}
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for _, tt := range tests {
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words := assembleArm64Words(t, arm64ExtProbeHead+"\t"+tt.stmt+"\n\tRET\n")
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@@ -1029,6 +1039,11 @@ func TestArm64AssembleExtensionShiftImmRefusals(t *testing.T) {
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{"ZSQSHL $6, Z23.B, P1.M, Z22.B", "the same register Zdn"},
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{"ZSQSHL $6, Z23.Q, P1.M, Z23.Q", "no size encoding"},
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{"ZSQSHL $8, Z23.B, P1.M, Z23.B", "outside the range 1..7"},
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{"ZSRI $6, Z7.B, Z23.H", "must match"},
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{"ZSRI $0, Z7.D, Z23.D", "outside the range 1..63"},
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{"ZASR $8, Z23.B, P1.M, Z23.B", "outside the range 1..7"},
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{"ZXAR $6, Z23.B, Z21.B, Z20.B", "the same register Zdn"},
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{"ZXAR $6, Z23.B, Z21.H, Z21.H", "must match"},
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}
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for _, tt := range tests {
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got := assembleArm64SrcError(t, arm64ExtProbeHead+"\t"+tt.stmt+"\n\tRET\n")
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@@ -516,12 +516,19 @@ func TestExtensionNamesARM64(t *testing.T) {
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"ZSQSHL",
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"ZSQSHLU",
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"ZUQSHL",
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"ZSRI",
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"ZSSRA",
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"ZUSRA",
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"ZSRSRA",
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"ZURSRA",
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"ZASRD",
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"ZXAR",
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}
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got := ExtensionNames(arch.ARM64)
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if strings.Join(got, ",") != strings.Join(want, ",") {
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t.Errorf("ExtensionNames(ARM64) = %v, want %v", got, want)
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}
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if n := len(arch.Extensions(arch.ARM64)); n != 528 {
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t.Errorf("the family registers %d instructions, want 528", n)
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if n := len(arch.Extensions(arch.ARM64)); n != 537 {
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t.Errorf("the family registers %d instructions, want 537", n)
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}
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}
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