feat(arch): the ZCNOT unary pair and the vector counter step

Assisted-by: GLM 5.3 Flash

arch/arm64_ext.go

@@ -735,6 +735,13 @@ const (
 	// Za.D, Zm.D, Zdn.D, Zdn.D, the last two naming the same register,
 	// which the encoding carries once in the destination slot.
 	ExtFormThreeSource
+	// ExtFormCountPnVec is the predicate-counter step whose result stays a
+	// vector, ZDECP P14.S, Z26.S: the vector is decremented in place by the
+	// predicate's active element count.  Operands: Pm.T, Zdn.T; the
+	// predicate occupies the four-bit field at bits 8..5, the vector the
+	// destination slot, and the predicate's arrangement feeds the size
+	// field.
+	ExtFormCountPnVec
 )
 
 // Arity returns the operand count the form takes.
@@ -771,6 +778,8 @@ func (f ExtForm) Arity() int {
 		return 3
 	case ExtFormZSameReg, ExtFormCountPn, ExtFormCTerm, ExtFormVLRead:
 		return 2
+	case ExtFormCountPnVec:
+		return 2
 	case ExtFormReduceReadBack:
 		return 4
 	case ExtFormSveLoad, ExtFormSveStore, ExtFormNarrow, ExtFormQuadReduce, ExtFormShiftWide,
@@ -837,6 +846,8 @@ func (f ExtForm) Kinds() []ExtOperandKind {
 		return []ExtOperandKind{ExtPReg, ExtPReg, ExtGReg}
 	case ExtFormCountPn:
 		return []ExtOperandKind{ExtPReg, ExtGReg}
+	case ExtFormCountPnVec:
+		return []ExtOperandKind{ExtPReg, ExtZReg}
 	case ExtFormCountPnW:
 		return []ExtOperandKind{ExtGReg, ExtPReg, ExtGReg}
 	case ExtFormReduce:
@@ -971,6 +982,8 @@ func (f ExtForm) String() string {
 		return "count to a register"
 	case ExtFormCountPn:
 		return "counter step, result dropped"
+	case ExtFormCountPnVec:
+		return "counter step on a vector"
 	case ExtFormCountPnW:
 		return "counter step to a register"
 	case ExtFormReduce:
@@ -1245,6 +1258,8 @@ func (in ExtInstr) Encode(ops []ExtOperand) ([]byte, error) {
 		return in.encodeCountP(ops)
 	case ExtFormCountPn:
 		return in.encodeCountPn(ops)
+	case ExtFormCountPnVec:
+		return in.encodeCountPnVec(ops)
 	case ExtFormCountPnW:
 		return in.encodeCountPnW(ops)
 	case ExtFormReduce:
@@ -2353,6 +2368,31 @@ func (in ExtInstr) encodeCountPn(ops []ExtOperand) ([]byte, error) {
 	return extWordLE(word), nil
 }
 
+// encodeCountPnVec fills the predicate-counter step on a vector: Pm.T,
+// Zdn.T, the vector decremented in place by the predicate's active element
+// count.  The predicate occupies the four-bit field at bits 8..5, the
+// vector the destination slot, and the predicate's arrangement feeds the
+// size field.
+func (in ExtInstr) encodeCountPnVec(ops []ExtOperand) ([]byte, error) {
+	pm, zdn := ops[0], ops[1]
+	if err := in.predicateOperand(pm, 1, 0, 15, ExtArrNone); err != nil {
+		return nil, err
+	}
+	if err := in.zVector(zdn, 2); err != nil {
+		return nil, err
+	}
+	size, ok := pm.Arr.sizeBits()
+	if !ok {
+		return nil, fmt.Errorf("%s: arrangement %s has no size encoding in this class",
+			in.Name, pm.Arr)
+	}
+	word := in.Word
+	word = extSet(word, extFieldPn4, uint32(pm.Reg))
+	word = extSet(word, extFieldRd, uint32(zdn.Reg))
+	word = extSet(word, in.Size, size)
+	return extWordLE(word), nil
+}
+
 // encodeCountPnW fills the predicate-counter step with a scalar result:
 // Rd, Pn.T, Rd, the destination spelled twice.  The predicate occupies the
 // four-bit field at bits 8..5 and its arrangement feeds the size field.
@@ -3410,12 +3450,19 @@ var arm64Extensions = []ExtInstr{
 		Word: 0x0419a000, Form: ExtFormZUnary, Size: extSizeBHSD, PgQual: ExtQualMerging, Feature: ExtFeatureSVE2p1, Ref: "ARM DDI 0487J SVE2.1: ZCLZ; inst_gen.go + arm64sveenc.s"},
 	{Name: "ZCLZ", Summary: "Z-alias of the predicated form, over a governing predicate",
 		Word: 0x0409a000, Form: ExtFormZUnary, Size: extSizeBHSD, PgQual: ExtQualZeroing, Feature: ExtFeatureSVE2p1, Ref: "ARM DDI 0487J SVE2.1: ZCLZ; inst_gen.go + arm64sveenc.s"},
+	{Name: "ZCNOT", Summary: "Z-alias of the predicated form, over a governing predicate",
+		Word: 0x041ba000, Form: ExtFormZUnary, Size: extSizeBHSD, PgQual: ExtQualMerging, Feature: ExtFeatureSVE2p1, Ref: "ARM DDI 0487J SVE2.1: ZCNOT; inst_gen.go + arm64sveenc.s"},
+	{Name: "ZCNOT", Summary: "Z-alias of the predicated form, over a governing predicate",
+		Word: 0x040ba000, Form: ExtFormZUnary, Size: extSizeBHSD, PgQual: ExtQualZeroing, Feature: ExtFeatureSVE2p1, Ref: "ARM DDI 0487J SVE2.1: ZCNOT; inst_gen.go + arm64sveenc.s"},
 	{Name: "ZCNT", Summary: "Z-alias of the predicated form, over a governing predicate",
 		Word: 0x041aa000, Form: ExtFormZUnary, Size: extSizeBHSD, PgQual: ExtQualMerging, Feature: ExtFeatureSVE2p1, Ref: "ARM DDI 0487J SVE2.1: ZCNT; inst_gen.go + arm64sveenc.s"},
 	{Name: "ZCNT", Summary: "Z-alias of the predicated form, over a governing predicate",
 		Word: 0x040aa000, Form: ExtFormZUnary, Size: extSizeBHSD, PgQual: ExtQualZeroing, Feature: ExtFeatureSVE2p1, Ref: "ARM DDI 0487J SVE2.1: ZCNT; inst_gen.go + arm64sveenc.s"},
 	{Name: "ZCOMPACT", Summary: "Compact or expand over a governing predicate",
 		Word: 0x05218000, Form: ExtFormZGov, Size: extSizeBHSD, Feature: ExtFeatureSVE2p1, Ref: "ARM DDI 0487J SVE2.1: ZCOMPACT; inst_gen.go + arm64sveenc.s"},
+	{Name: "ZDECP", Summary: "Decrement a vector by a predicate's active elements",
+		Word: 0x252d8000, Form: ExtFormCountPnVec, Size: extSizeBHSD, Feature: ExtFeatureSVE2p1,
+		Ref: "ARM DDI 0487J SVE2.1: DECP (vector) as ZDECP; inst_gen.go + arm64sveenc.s"},
 	{Name: "ZDUP", Summary: "Copy or insert a general register, .D locked",
 		Word: 0x05e03800, Form: ExtFormZFromGeneral, Arr: ExtArrD, Feature: ExtFeatureSVE2p1, Ref: "ARM DDI 0487J SVE2.1: ZDUP; inst_gen.go + arm64sveenc.s"},
 	{Name: "ZEOR", Summary: "Z-alias of the unpredicated three-vector form, locked to .D",