feat(asm): add the EVEX FP helper tail and gather/scatter with VSIB

Assisted-by: Qwen 3.8 Max Preview

docs/ARCHITECTURE.md

@@ -237,7 +237,14 @@ operand), and the wider AVX-512 set: ternary logic, lane shuffles, inserts
 and extracts, compares with an opmask destination, the permutes, the
 expand/compress family, the broadcasts, the opmask-register instructions
 (KAND/KOR/KXNOR/KADD/KUNPCK/KNOT/KSHIFTL/KORTEST and KMOVQ), the aligned
-moves and the remaining extending/narrowing moves.  The EVEX mnemonic
+moves and the remaining extending/narrowing moves, the floating-point
+helper and conversion tail (VRCP14*, VRSQRT14*, VGETEXP*, VGETMANT*,
+VSCALEF*, VRNDSCALE*, VREDUCE*, VFIXUPIMM*, VRANGE*, VFPCLASS* with an
+opmask destination, and the remaining VCVT* conversions including the
+half-precision pair), and gather/scatter with VSIB addressing — both the
+VEX spelling with a vector mask register and the EVEX spelling with an
+explicit K mask, where the EVEX length follows the VSIB index register,
+not the data register.  The EVEX mnemonic
 suffixes — rounding modes (.RN_SAE/.RD_SAE/.RU_SAE/.RZ_SAE),
 suppress-all-exceptions (.SAE) and memory broadcast (.BCST) — set the EVEX
 b bit and the L'L rounding-control field (broadcast keeps the vector length