feat(arch): the rest of the SVE2 BFloat16 wall

Assisted-by: GLM 5.3 Flash
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petrbalvin committed 2026-10-07 20:35:41 +02:00
1 parent cdc3a75c88
commit 12a5cfff52
4 files changed
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@@ -1551,6 +1551,28 @@ func TestArm64ExtStage4Golden(t *testing.T) {
{"ZBFSUB Z7.H, Z6.H, Z23.H", "ZBFSUB", ExtFormVectorsZm, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(7, ExtArrH), ExtVector(6, ExtArrH), ExtVector(23, ExtArrH)},
0x650704d7},
// The rest of the BFloat16 wall.
{"ZBFCVT Z13.S, P1.M, Z22.H", "ZBFCVT", ExtFormConvert, ExtQualMerging, ExtArrNone,
[]ExtOperand{ExtVector(13, ExtArrS), ExtPredicate(1, ExtQualMerging), ExtVector(22, ExtArrH)},
0x658aa5b6},
{"ZBFCVT Z13.S, P1.Z, Z22.H", "ZBFCVT", ExtFormConvert, ExtQualZeroing, ExtArrNone,
[]ExtOperand{ExtVector(13, ExtArrS), ExtPredicate(1, ExtQualZeroing), ExtVector(22, ExtArrH)},
0x649ac5b6},
{"ZBFDOT Z7.H, Z6.H, Z23.S", "ZBFDOT", ExtFormLongMul, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(7, ExtArrH), ExtVector(6, ExtArrH), ExtVector(23, ExtArrS)},
0x646780d7},
{"ZBFMLA Z23.H, Z13.H, P1.M, Z22.H", "ZBFMLA", ExtFormMulPred, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(23, ExtArrH), ExtVector(13, ExtArrH), ExtPredicate(1, ExtQualMerging), ExtVector(22, ExtArrH)},
0x653705b6},
{"ZBFMLALB Z7.H, Z6.H, Z23.S", "ZBFMLALB", ExtFormLongMul, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(7, ExtArrH), ExtVector(6, ExtArrH), ExtVector(23, ExtArrS)},
0x64e780d7},
{"ZBFMMLA Z7.H, Z6.H, Z23.S", "ZBFMMLA", ExtFormLongMul, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(7, ExtArrH), ExtVector(6, ExtArrH), ExtVector(23, ExtArrS)},
0x6467e4d7},
{"ZBFSCALE Z23.H, Z13.H, P1.M, Z13.H", "ZBFSCALE", ExtFormZPredicatedSource, ExtQualMerging, ExtArrH,
[]ExtOperand{ExtVector(23, ExtArrH), ExtVector(13, ExtArrH), ExtPredicate(1, ExtQualMerging), ExtVector(13, ExtArrH)},
0x650986ed},
// The multiple-structure loads and stores.
{"ZLD2B (R6)(R14), P4.Z, [Z13.B, Z14.B]", "ZLD2B", ExtFormSveLoad, ExtQualNone, ExtArrB,
[]ExtOperand{ExtSveMemPair(6, 0, 14, false), ExtPredicate(4, ExtQualZeroing), ExtOperand{Kind: ExtZReg, Reg: 13, Arr: ExtArrB, List: 2}},