fix(asm): enforce the arm64 TLBI, RPRFM, FCVT and integer-pair arities

Assisted-by: GLM 5.3

asm/arm64_sysregs.go

@@ -3,6 +3,8 @@
 
 package asm
 
+import "strings"
+
 // arm64 system registers and system-instruction aliases.
 //
 // The tables are transcribed from the data the Go toolchain itself carries
@@ -546,6 +548,16 @@ var a64TLBIOps = map[string]a64SysInst{
 	"VMALLS12E1OS": {0x4, 0x1, 0x6},
 }
 
+// arm64TLBITakesReg reports whether a TLBI operation spells a by-address
+// invalidation that carries the address in its optional second register
+// (asm7.go's sysInstFields hasOperand2).  The whole-entry spellings are
+// exactly the VMALL-prefixed and the ALL-prefixed ones; everything else
+// (VAE*, VAAE*, VALE*, RVAA*, RVAE*, ASIDE1*, IPAS2*, RIPAS2*) is
+// by-address and takes the register.
+func arm64TLBITakesReg(name string) bool {
+	return !strings.HasPrefix(name, "VMALL") && !strings.HasPrefix(name, "ALL")
+}
+
 // a64DCOps2 maps the DC operation names to their fields; the register
 // operand is mandatory.
 var a64DCOps2 = map[string]a64SysInst{