fix(asm): correct RISC-V operand order and complete RVC compression
Assisted-by: DeepSeek V4 Pro
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@@ -7,6 +7,7 @@ import (
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"bytes"
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"fmt"
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"os"
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"strings"
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"testing"
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"sourcedock.dev/petrbalvin/gasm-devkit/asm"
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@@ -81,11 +82,23 @@ func diffHex(a, b []byte) string {
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}
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for i := 0; i < n; i += 4 {
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ab, bb := "??", "??"
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if i < len(a) {
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if i+4 <= len(a) {
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ab = fmt.Sprintf("%02x%02x%02x%02x", a[i], a[i+1], a[i+2], a[i+3])
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} else if i < len(a) {
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var sb strings.Builder
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for j := i; j < len(a); j++ {
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fmt.Fprintf(&sb, "%02x", a[j])
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}
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ab = sb.String()
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}
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if i < len(b) {
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if i+4 <= len(b) {
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bb = fmt.Sprintf("%02x%02x%02x%02x", b[i], b[i+1], b[i+2], b[i+3])
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} else if i < len(b) {
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var sb strings.Builder
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for j := i; j < len(b); j++ {
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fmt.Fprintf(&sb, "%02x", b[j])
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}
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bb = sb.String()
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}
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mark := " "
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if ab != bb {
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