feat(debug): instruction-level coverage and FP register display

Assisted-by: GLM 5.3 Flash

debug/ptrace_linux_riscv64.go

@@ -76,10 +76,18 @@ func (s *Session) GetFPRegs() (FPRegs, error) {
 	return fp, nil
 }
 
-// VectorRegs holds the vector register state (placeholder).
-type VectorRegs struct{}
+// VectorRegs holds the FP register state shown by the regs command
+// (riscv64 has 32 64-bit FP registers and fcsr).
+type VectorRegs struct {
+	F    [32]uint64
+	FCSR uint32
+}
 
-// GetVectorRegs retrieves the vector registers (not yet implemented for riscv64).
+// GetVectorRegs retrieves the FP registers.
 func (s *Session) GetVectorRegs() (VectorRegs, error) {
-	return VectorRegs{}, nil
+	fp, err := s.GetFPRegs()
+	if err != nil {
+		return VectorRegs{}, err
+	}
+	return VectorRegs{F: fp.F, FCSR: fp.FCSR}, nil
 }