fix(asm): size the arm64 logical-immediate materialisation exactly

Assisted-by: GLM 5.3

asm/arm64_assemble.go

@@ -313,22 +313,26 @@ func arm64InstrSize(instr *ast.Instr, fi arm64FrameInfo, pos int) int {
 		return arm64MovSize(mnem, ops, fi)
 	}
 	// The logical-immediate family: one word on the bitmask fast path (a
-	// real destination, or the flags-only TST spellings), two words for the
-	// materialisation the ZR destinations and the non-bitmask immediates
-	// take.  Mirrors encodeARM64DPSR's decision exactly.
+	// real destination, or the flags-only TST spellings), otherwise the
+	// constant materialisation into REGTMP plus the register-form tail.
+	// Mirrors encodeARM64DPSR's decision exactly, the materialisation word
+	// count included: a MOVZ plus up to three MOVKs makes five words.
 	if len(ops) >= 2 && len(ops) <= 3 && isImmOperand(ops[0]) {
 		switch mnem {
 		case "AND", "ANDW", "ANDS", "ANDSW", "ORR", "ORRW", "EOR", "EORW",
 			"BIC", "BICW", "BICS", "BICSW", "ORN", "ORNW", "EON", "EONW",
 			"TST", "TSTW":
 			if v, ok := arm64ImmOperandValue(ops[0]); ok {
+				written := v
 				switch mnem {
 				case "BIC", "BICW", "BICS", "BICSW", "ORN", "ORNW", "EON", "EONW":
 					v = ^v
 				}
 				width := 64
+				mwMnem := "MOVD"
 				if strings.HasSuffix(mnem, "W") {
 					width = 32
+					mwMnem = "MOVW"
 				}
 				zrDest := false
 				if mnem != "TST" && mnem != "TSTW" {
@@ -337,7 +341,10 @@ func arm64InstrSize(instr *ast.Instr, fi arm64FrameInfo, pos int) int {
 				if _, _, _, bc := a64LogicalImm(v, width); bc && (mnem == "TST" || mnem == "TSTW" || !zrDest) {
 					return 4
 				}
-				return 8
+				if mw, err := encodeARM64LoadImm(27, written, mwMnem); err == nil {
+					return len(mw) + 4
+				}
+				return 4
 			}
 		}
 	}