feat(arch): add the FP16 complex multiply and minimum-maximum to the extension layer
Assisted-by: GLM 5.3 Flash
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petrbalvin committed
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@@ -1313,6 +1313,84 @@ var amd64GoldenRows = []amd64GoldenRow{
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{"vfmaddsub132ph k5 merging, memory source", "VFMADDSUB132PH",
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[]ExtOperand{ExtZmm(29), ExtMemory(9, 0), ExtWriteMasked(ExtZmm(30), 5, false)},
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"624615459631", "62 46 15 45 96 31 vfmaddsub132ph (%r9),%zmm29,%zmm30{%k5}"},
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// The complex multiply, EVEX.NDS.F3.MAP6.W0 D6 and EVEX.NDS.F2.MAP6.W0
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// D6, the scalar pair at D7. No broadcast: a complex value needs both
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// of its halves beside one another, so the memory shape reads its
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// full-width vector plain.
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{"vfmulcph", "VFMULCPH",
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[]ExtOperand{ExtZmm(29), ExtZmm(28), ExtZmm(30)},
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"62061640d6f4", "62 06 16 40 d6 f4 vfmulcph %zmm28,%zmm29,%zmm30"},
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{"vfmulcph ymm", "VFMULCPH",
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[]ExtOperand{ExtYmm(5), ExtYmm(4), ExtYmm(6)},
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"62f65628d6f4", "62 f6 56 28 d6 f4 vfmulcph %ymm4,%ymm5,%ymm6"},
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{"vfmulcph xmm", "VFMULCPH",
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[]ExtOperand{ExtXmm(5), ExtXmm(4), ExtXmm(6)},
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"62f65608d6f4", "62 f6 56 08 d6 f4 vfmulcph %xmm4,%xmm5,%xmm6"},
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{"vfcmulcph", "VFCMULCPH",
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[]ExtOperand{ExtZmm(29), ExtZmm(28), ExtZmm(30)},
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"62061740d6f4", "62 06 17 40 d6 f4 vfcmulcph %zmm28,%zmm29,%zmm30"},
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{"vfcmulcph ymm", "VFCMULCPH",
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[]ExtOperand{ExtYmm(5), ExtYmm(4), ExtYmm(6)},
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"62f65728d6f4", "62 f6 57 28 d6 f4 vfcmulcph %ymm4,%ymm5,%ymm6"},
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{"vfcmulcph xmm", "VFCMULCPH",
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[]ExtOperand{ExtXmm(5), ExtXmm(4), ExtXmm(6)},
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"62f65708d6f4", "62 f6 57 08 d6 f4 vfcmulcph %xmm4,%xmm5,%xmm6"},
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{"vfmulcsh", "VFMULCSH",
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[]ExtOperand{ExtXmm(29), ExtXmm(28), ExtXmm(30)},
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"62061600d7f4", "62 06 16 00 d7 f4 vfmulcsh %xmm28,%xmm29,%xmm30"},
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{"vfcmulcsh", "VFCMULCSH",
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[]ExtOperand{ExtXmm(29), ExtXmm(28), ExtXmm(30)},
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"62061700d7f4", "62 06 17 00 d7 f4 vfcmulcsh %xmm28,%xmm29,%xmm30"},
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{"vfmulcph memory source", "VFMULCPH",
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[]ExtOperand{ExtZmm(29), ExtMemory(1, 127), ExtZmm(30)},
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"62661640d6717f", "62 66 16 40 d6 71 7f vfmulcph 0x1fc0(%rcx),%zmm29,%zmm30 (Disp8(7f))"},
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{"vfcmulcph memory source", "VFCMULCPH",
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[]ExtOperand{ExtZmm(29), ExtMemory(9, 0), ExtZmm(30)},
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"62461740d631", "62 46 17 40 d6 31 vfcmulcph (%r9),%zmm29,%zmm30"},
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{"vfmulcsh memory source", "VFMULCSH",
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[]ExtOperand{ExtXmm(29), ExtMemory(9, 0), ExtXmm(30)},
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"62461600d731", "62 46 16 00 d7 31 vfmulcsh (%r9),%xmm29,%xmm30"},
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{"vfmulcph rz-sae", "VFMULCPH",
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[]ExtOperand{ExtZmm(29), ExtZmm(28), ExtRounded(ExtZmm(30), ExtRoundTruncate)},
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"62061670d6f4", "62 06 16 70 d6 f4 vfmulcph {rz-sae},%zmm28,%zmm29,%zmm30"},
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{"vfcmulcph rn-sae", "VFCMULCPH",
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[]ExtOperand{ExtZmm(5), ExtZmm(4), ExtRounded(ExtZmm(6), ExtRoundNearest)},
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"62f65718d6f4", "62 f6 57 18 d6 f4 vfcmulcph {rn-sae},%zmm4,%zmm5,%zmm6"},
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{"vfmulcsh rn-sae", "VFMULCSH",
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[]ExtOperand{ExtXmm(5), ExtXmm(4), ExtRounded(ExtXmm(6), ExtRoundNearest)},
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"62f65618d7f4", "62 f6 56 18 d7 f4 vfmulcsh {rn-sae},%xmm4,%xmm5,%xmm6"},
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{"vfcmulcsh ru-sae, high registers", "VFCMULCSH",
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[]ExtOperand{ExtXmm(29), ExtXmm(28), ExtRounded(ExtXmm(30), ExtRoundUp)},
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"62061750d7f4", "62 06 17 50 d7 f4 vfcmulcsh {ru-sae},%xmm28,%xmm29,%xmm30"},
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{"vfmulcph k7 zeroing", "VFMULCPH",
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[]ExtOperand{ExtZmm(29), ExtZmm(28), ExtWriteMasked(ExtZmm(30), 7, true)},
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"620616c7d6f4", "62 06 16 c7 d6 f4 vfmulcph %zmm28,%zmm29,%zmm30{%k7}{z}"},
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{"vfcmulcph k5 merging, memory source", "VFCMULCPH",
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[]ExtOperand{ExtZmm(29), ExtMemory(9, 0), ExtWriteMasked(ExtZmm(30), 5, false)},
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"62461745d631", "62 46 17 45 d6 31 vfcmulcph (%r9),%zmm29,%zmm30{%k5}"},
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// VMINMAXPH, EVEX.NDS.0F3A.W0 52 /r /ib: the control byte leads the
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// operand list and rides last in the word, the order the reference
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// listings write both in.
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{"vminmaxph", "VMINMAXPH",
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[]ExtOperand{ExtImmediate(0x88), ExtZmm(29), ExtZmm(28), ExtZmm(30)},
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"6203144052f488", "62 03 14 40 52 f4 88 vminmaxph $0x88,%zmm28,%zmm29,%zmm30"},
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{"vminmaxph ymm", "VMINMAXPH",
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[]ExtOperand{ExtImmediate(0x88), ExtYmm(5), ExtYmm(4), ExtYmm(6)},
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"62f3542852f488", "62 f3 54 28 52 f4 88 vminmaxph $0x88,%ymm4,%ymm5,%ymm6"},
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{"vminmaxph xmm", "VMINMAXPH",
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[]ExtOperand{ExtImmediate(0x88), ExtXmm(5), ExtXmm(4), ExtXmm(6)},
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"62f3540852f488", "62 f3 54 08 52 f4 88 vminmaxph $0x88,%xmm4,%xmm5,%xmm6"},
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{"vminmaxph memory source", "VMINMAXPH",
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[]ExtOperand{ExtImmediate(0x88), ExtZmm(29), ExtMemory(1, 127), ExtZmm(30)},
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"6263144052717f88", "62 63 14 40 52 71 7f 88 vminmaxph $0x88,0x1fc0(%rcx),%zmm29,%zmm30 (Disp8(7f))"},
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{"vminmaxph memory source plain", "VMINMAXPH",
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[]ExtOperand{ExtImmediate(0x88), ExtZmm(29), ExtMemory(9, 0), ExtZmm(30)},
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"62431440523188", "62 43 14 40 52 31 88 vminmaxph $0x88,(%r9),%zmm29,%zmm30"},
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{"vminmaxph k7 zeroing", "VMINMAXPH",
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[]ExtOperand{ExtImmediate(0x88), ExtZmm(29), ExtZmm(28), ExtWriteMasked(ExtZmm(30), 7, true)},
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"620314c752f488", "62 03 14 c7 52 f4 88 vminmaxph $0x88,%zmm28,%zmm29,%zmm30{%k7}{z}"},
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}
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// amd64ResolveEntry finds the table entry a golden row exercises: the entry
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@@ -1646,12 +1724,21 @@ func TestAmd64ExtRejects(t *testing.T) {
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{"broadcast on the scalar multiply-add", "VFMADD132SH",
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[]ExtOperand{ExtXmm(29), ExtBroadcast(9, 0), ExtXmm(30)},
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"the entry's memory operand takes none"},
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{"broadcast on the complex multiply", "VFMULCPH",
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[]ExtOperand{ExtZmm(29), ExtBroadcast(9, 0), ExtZmm(30)},
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"the entry's memory operand takes none"},
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{"rounding on the 256-bit multiply-add", "VFMADD132PH",
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[]ExtOperand{ExtYmm(5), ExtYmm(4), ExtRounded(ExtYmm(6), ExtRoundNearest)},
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"the entry's destination takes none"},
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{"rounding on the minimum-maximum", "VMINMAXPH",
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[]ExtOperand{ExtImmediate(0x88), ExtZmm(5), ExtZmm(4), ExtRounded(ExtZmm(6), ExtRoundNearest)},
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"the entry's destination takes none"},
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{"a register where the multiply-add reads memory", "VFMSUB231PH",
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[]ExtOperand{ExtZmm(29), ExtYmm(4), ExtZmm(30)},
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"wants a ZMM register"},
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{"the complex multiply's scalar destination", "VFMULCPH",
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[]ExtOperand{ExtZmm(29), ExtZmm(28), ExtXmm(30)},
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"wants a ZMM register"},
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} {
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in := amd64ExtInstr(t, tt.mnem, operandClass(t, tt.ops))
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_, err := in.Encode(tt.ops)
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@@ -1796,7 +1883,7 @@ func TestAmd64ExtArchBinding(t *testing.T) {
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t.Errorf("Extensions(%s) carries %d instructions, want none", a, len(got))
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}
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}
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if got := Extensions(AMD64); len(got) != 163 {
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t.Errorf("the amd64 layer registers %d instructions, want 163", len(got))
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if got := Extensions(AMD64); len(got) != 174 {
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t.Errorf("the amd64 layer registers %d instructions, want 174", len(got))
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}
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}
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