feat(parser): bracket register ranges, index-only VSIB and bare trailing immediates

Assisted-by: GLM 5.3 Flash
This commit is contained in:
2026-09-20 22:02:19 +02:00
parent 81d4bd81e4
commit 522e6f2ae8
6 changed files with 255 additions and 13 deletions
+2
View File
@@ -123,9 +123,11 @@ func TestGroundTruthAMD64(t *testing.T) {
"../testdata/verify/sse_amd64.s",
"../testdata/verify/avx_amd64.s",
"../testdata/verify/pfx_amd64.s",
"../testdata/verify/vsib_amd64.s",
"../testdata/verify/rawdata_amd64.s",
"../testdata/verify/avx512_amd64.s",
"../testdata/verify/pfx_amd64.s",
"../testdata/verify/vsib_amd64.s",
"../testdata/verify/rawdata_amd64.s",
"../testdata/verify/avx512_amd64.s",
"../testdata/verify/doubleshift_amd64.s",