docs(asm): describe the four target architectures

Assisted-by: GLM 5.3 Flash
2026-09-21 20:15:55 +02:00
parent 8a36af7c7d
commit 53de91b2df
6 changed files with 461 additions and 6 deletions
@@ -9,6 +9,14 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0

 ### Added

+- **Per-architecture reference pages.**  [docs/asm/](docs/asm/README.md)
+  gains AMD64, ARM64, RISCV64 and LOONG64: the register files and the
+  roles the ABI fixes, addressing, operand order with every special form,
+  constants and materialisation, alignment, fences and the relocations
+  each target emits.  An instruction inventory appendix per architecture
+  is generated from the toolchain's own tables by `just gen`, and the
+  regenerated tables recognise 147 more mnemonics than the previous
+  release carried (arm64 107, riscv64 31, loong64 9).
 - **The Plan 9 assembly language reference.**  [docs/asm/](docs/asm/README.md)
  opens the complete language reference with its common core: the lexicon,
  statement structure and constant expressions, the operand grammar with