feat(arm64): encode pairs, atomics, crypto, system and NEON slices
Assisted-by: DeepSeek V4.1 Flash
This commit is contained in:
+449
-5
@@ -472,12 +472,456 @@ TEXT ·f(SB), NOSPLIT, $0-0
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}
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}
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// TestArm64SIMD tests SIMD encoding (via the instruction table).
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// TestArm64SIMD tests SIMD encoding (via the arrangement-aware table).
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func TestArm64SIMD(t *testing.T) {
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// Verify SIMD instructions are in the table.
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for _, mnem := range []string{"VADD", "VSUB", "VMUL"} {
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if _, ok := a64InstrTable[mnem]; !ok {
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t.Errorf("%s not in instruction table", mnem)
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// Verify SIMD instructions are in the arrangement table.
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for _, mnem := range []string{"VADD", "VSUB", "VMUL", "VAND", "VEOR", "VORR", "VCMEQ", "VZIP1", "VZIP2"} {
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if _, ok := a64SimdVTable[mnem]; !ok {
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t.Errorf("%s not in the SIMD arrangement table", mnem)
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}
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}
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}
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// TestArm64CarryAndBitOps pins the carry-setting arithmetic, the widening
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// multiplies and the data-processing (1 source) group against go tool asm.
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func TestArm64CarryAndBitOps(t *testing.T) {
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got := arm64Words(t, "\tADC R0, R2, R12\n\tADCS $0, R1\n\tSBCS R5, R9, R5\n\tSBC R25, R10, R26\n"+
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"\tMUL R4, R3, R0\n\tUMULH R24, R20, R24\n\tSMULH R1, R2, R3\n\tMSUB R19, R16, R26, R2\n"+
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"\tRBIT R11, R4\n\tREV R1, R2\n\tCLZ R21, R9\n\tREVW R1, R2\n\tCLSW R1, R2\n")
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want := []uint32{
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0x9a00004c, // ADC R12, R2, R0
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0xba1f0021, // ADCS R1, R1, ZR
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0xfa050125, // SBCS R5, R9, R5
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0xda19015a, // SBC R26, R10, R25
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0x9b047c60, // MUL R0, R3, R4
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0x9bd87e98, // UMULH R24, R20, R24
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0x9b417c43, // SMULH R3, R2, R1
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0x9b13c342, // MSUB R2, R26, R19, R16
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0xdac00164, // RBIT R4, R11
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0xdac00c22, // REV R2, R1
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0xdac012a9, // CLZ R9, R21
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0x5ac00822, // REVW R2, R1
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0x5ac01422, // CLSW R2, R1
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0xd65f03c0, // RET
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}
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if len(got) != len(want) {
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t.Fatalf("word count = %d, want %d", len(got), len(want))
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}
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for i := range want {
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if got[i] != want[i] {
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t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
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}
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}
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}
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// TestArm64BitfieldExtract pins UBFX/SBFX: immr wraps to the register
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// width, an out-of-range imms is an error.
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func TestArm64BitfieldExtract(t *testing.T) {
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got := arm64Words(t, "\tUBFX $33, R17, $25, R5\n\tUBFXW $4, R1, $9, R2\n")
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want := []uint32{
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0xd361e625, // UBFX immr=1 (33 wrapped), imms=25
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0x53043022, // UBFXW immr=4, imms=9
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0xd65f03c0,
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}
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if len(got) != len(want) {
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t.Fatalf("word count = %d, want %d", len(got), len(want))
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}
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for i := range want {
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if got[i] != want[i] {
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t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
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}
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}
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for _, body := range []string{"\tUBFX $33, R17, $70, R5\n", "\tUBFX $-1, R17, $3, R5\n"} {
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f, errs := parser.Parse("test_arm64.s", "#include \"textflag.h\"\n\nTEXT ·f(SB), NOSPLIT, $0-0\n"+body+"\tRET\n")
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if len(errs) > 0 {
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t.Fatalf("parse: %v", errs)
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}
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if _, err := AssembleFileARM64(f); err == nil {
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t.Errorf("%s: expected an error, got none", body)
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}
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}
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}
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// TestArm64CondCompare pins CCMP/CCMN.
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func TestArm64CondCompare(t *testing.T) {
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got := arm64Words(t, "\tCCMP LE, R7, $19, $3\n\tCCMP LT, R30, R6, $7\n\tCCMN EQ, R1, R2, $3\n\tCCMPW LE, R7, $19, $3\n")
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want := []uint32{
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0xfa53d8e3, // CCMP imm form
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0xfa46b3c7, // CCMP register form
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0xba420023, // CCMN register form
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0x7a53d8e3, // CCMPW
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0xd65f03c0,
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}
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if len(got) != len(want) {
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t.Fatalf("word count = %d, want %d", len(got), len(want))
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}
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for i := range want {
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if got[i] != want[i] {
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t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
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}
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}
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}
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// TestArm64CompareBranch pins CBZ/CBNZ/TBZ/TBNZ against a label five and
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// six words ahead, matching go tool asm's own offsets.
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func TestArm64CompareBranch(t *testing.T) {
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// Layout: CBZ(0) TBZ(4) TBNZ(8) CBNZ(12) NOP(16) NOP(17th word...) done.
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src := "#include \"textflag.h\"\n\nTEXT ·f(SB), NOSPLIT, $0-0\n" +
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"\tCBZ R1, done\n\tTBZ $4, R7, done\n\tTBNZ $33, R7, done\n\tCBNZW R2, done\n" +
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"\tNOP\n\tNOP\n\tdone:\tNOP\n\tRET\n"
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f, errs := parser.Parse("test_arm64.s", src)
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if len(errs) > 0 {
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t.Fatalf("parse: %v", errs)
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}
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img, err := AssembleFileARM64(f)
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if err != nil {
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t.Fatalf("AssembleFileARM64: %v", err)
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}
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got := leWords(img.Code)
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// done sits at word 6 from each branch's own pc: CBZ rel 6, TBZ rel 5,
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// TBNZ rel 4, CBNZW rel 3.
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want := []uint32{
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0xb40000c1, // CBZ R1, +6
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0x362000a7, // TBZ $4, R7, +5
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0xb7080087, // TBNZ $33, R7, +4
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0x35000062, // CBNZW R2, +3
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0xd503201f, 0xd503201f, 0xd503201f,
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0xd65f03c0,
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}
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if len(got) != len(want) {
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t.Fatalf("word count = %d, want %d", len(got), len(want))
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}
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for i := range want {
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if got[i] != want[i] {
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t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
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}
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}
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}
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// TestArm64ADR pins ADR against a forward label.
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func TestArm64ADR(t *testing.T) {
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src := "#include \"textflag.h\"\n\nTEXT ·f(SB), NOSPLIT, $0-0\n" +
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"\tADR done, R10\n\tNOP\n\tNOP\n\tdone:\tNOP\n\tRET\n"
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f, errs := parser.Parse("test_arm64.s", src)
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if len(errs) > 0 {
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t.Fatalf("parse: %v", errs)
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}
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img, err := AssembleFileARM64(f)
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if err != nil {
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t.Fatalf("AssembleFileARM64: %v", err)
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}
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got := leWords(img.Code)
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// rel = 12 bytes: immlo 0, immhi 3.
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want := []uint32{0x1000006a, 0xd503201f, 0xd503201f, 0xd503201f, 0xd65f03c0}
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if len(got) != len(want) {
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t.Fatalf("word count = %d, want %d", len(got), len(want))
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}
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for i := range want {
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if got[i] != want[i] {
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t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
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}
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}
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}
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// TestArm64PairLoadStore pins LDP/STP/LDPW/FLDPD/FSTPD.
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func TestArm64PairLoadStore(t *testing.T) {
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got := arm64Words(t, "\tSTP (R2, R3), 8(R5)\n\tLDP -8(R5), (R2, R3)\n\tLDPW 4(R0), (R1, R2)\n\tSTPW (R1, R2), 4(R0)\n"+
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"\tFLDPD 8(R0), (F1, F2)\n\tFSTPD (F3, F4), -8(R5)\n")
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want := []uint32{
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0xa9008ca2, // STP (R2, R3), 8(R5)
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0xa97f8ca2, // LDP -8(R5), (R2, R3)
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0x29408801, // LDPW 4(R0), (R1, R2)
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0x29008801, // STPW (R1, R2), 4(R0)
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0x6d408801, // FLDPD 8(R0), (F1, F2)
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0x6d3f90a3, // FSTPD (F3, F4), -8(R5)
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0xd65f03c0,
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}
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if len(got) != len(want) {
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t.Fatalf("word count = %d, want %d", len(got), len(want))
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}
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for i := range want {
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if got[i] != want[i] {
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t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
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}
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}
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}
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// TestArm64AcquireRelease pins LDAR/STLR and the acquire/release LSE
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// families.
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func TestArm64AcquireRelease(t *testing.T) {
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got := arm64Words(t, "\tLDAR (R27), R22\n\tLDARB (R25), R2\n\tLDARW (R12), R29\n\tSTLR R3, (R24)\n\tSTLRB R11, (R22)\n"+
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"\tCASALD R5, (R6), R7\n\tLDADDALD R5, (R6), R7\n\tLDCLRALB R5, (R6), R7\n\tLDORALD R5, (RSP), R7\n\tSWPALW R5, (R6), R7\n")
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want := []uint32{
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0xc8dfff76, // LDAR R22, (R27)
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0x08dfff22, // LDARB R2, (R25)
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0x88dffd9d, // LDARW R29, (R12)
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0xc89fff03, // STLR R3, (R24)
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0x089ffecb, // STLRB R11, (R22)
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0xc8e5fcc7, // CASALD R7, (R6), R5
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0xf8e500c7, // LDADDALD R7, (R6), R5
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0x38e510c7, // LDCLRALB R7, (R6), R5
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0xf8e533e7, // LDORALD R7, (RSP), R5
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0xb8e580c7, // SWPALW R7, (R6), R5
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0xd65f03c0,
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}
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if len(got) != len(want) {
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t.Fatalf("word count = %d, want %d", len(got), len(want))
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}
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for i := range want {
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if got[i] != want[i] {
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t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
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}
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}
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}
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// TestArm64System pins BRK, SVC, the barriers, cache maintenance and the
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// system register accesses.
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func TestArm64System(t *testing.T) {
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got := arm64Words(t, "\tBRK $35943\n\tBRK\n\tSVC $7165\n\tDMB $1\n\tDSB $1\n\tISB $15\n"+
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"\tDC ZVA, R4\n\tDC IVAC, R1\n\tMRS DCZID_EL0, R3\n\tMRS CNTVCT_EL0, R0\n\tMSR $9, DAIFSet\n\tMSR $3, SPSel\n"+
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"\tPRFM (R0), PLDL1KEEP\n\tPRFM (R3), PLDL3KEEP\n\tPRFM (R2), $25\n")
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want := []uint32{
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0xd4318ce0, // BRK $35943
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0xd4200000, // BRK
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0xd4037fa1, // SVC $7165
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0xd50331bf, // DMB $1
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0xd503319f, // DSB $1
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0xd5033fdf, // ISB $15
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0xd50b7424, // DC ZVA, R4
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0xd5087621, // DC IVAC, R1
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0xd53b00e3, // MRS DCZID_EL0, R3
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0xd53be040, // MRS CNTVCT_EL0, R0
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0xd50349df, // MSR $9, DAIFSet
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0xd50043bf, // MSR $3, SPSel
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0xf9800000, // PRFM (R0), PLDL1KEEP
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0xf9800064, // PRFM (R3), PLDL3KEEP
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0xf9800059, // PRFM (R2), $25
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0xd65f03c0,
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}
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if len(got) != len(want) {
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t.Fatalf("word count = %d, want %d", len(got), len(want))
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}
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for i := range want {
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if got[i] != want[i] {
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t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
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}
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}
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}
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// TestArm64Crypto pins the AES and SHA families.
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func TestArm64Crypto(t *testing.T) {
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got := arm64Words(t, "\tAESE V31.B16, V29.B16\n\tAESD V22.B16, V19.B16\n\tAESIMC V12.B16, V27.B16\n\tAESMC V14.B16, V28.B16\n"+
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"\tSHA1C V8.S4, V8, V2\n\tSHA1H V17, V25\n\tSHA1P V3.S4, V20, V27\n\tSHA1SU0 V17.S4, V13.S4, V16.S4\n\tSHA1SU1 V24.S4, V23.S4\n"+
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"\tSHA256H V4.S4, V2, V11\n\tSHA256H2 V6.S4, V16, V11\n\tSHA256SU0 V0.S4, V16.S4\n\tSHA256SU1 V31.S4, V3.S4, V15.S4\n"+
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"\tSHA512H V2.D2, V1, V0\n\tSHA512H2 V4.D2, V3, V2\n\tSHA512SU0 V9.D2, V8.D2\n\tSHA512SU1 V7.D2, V6.D2, V5.D2\n")
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want := []uint32{
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0x4e284bfd, // AESE
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0x4e285ad3, // AESD
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0x4e28799b, // AESIMC
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0x4e2869dc, // AESMC
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0x5e080102, // SHA1C
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0x5e280a39, // SHA1H
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0x5e03129b, // SHA1P
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0x5e1131b0, // SHA1SU0
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0x5e281b17, // SHA1SU1
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0x5e04404b, // SHA256H
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0x5e06520b, // SHA256H2
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0x5e282810, // SHA256SU0
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0x5e1f606f, // SHA256SU1
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0xce628020, // SHA512H
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0xce648462, // SHA512H2
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0xcec08128, // SHA512SU0
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0xce6788c5, // SHA512SU1
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0xd65f03c0,
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}
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if len(got) != len(want) {
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t.Fatalf("word count = %d, want %d", len(got), len(want))
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}
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for i := range want {
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if got[i] != want[i] {
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t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
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}
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}
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}
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// TestArm64SIMDLogical pins the arrangement-aware three- and two-register
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// SIMD paths.
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func TestArm64SIMDLogical(t *testing.T) {
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got := arm64Words(t, "\tVADD V1.B16, V2.B16, V3.B16\n\tVAND V4.B16, V4.B16, V9.B16\n\tVEOR V0.B16, V1.B16, V0.B16\n"+
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"\tVORR V5.B16, V4.B16, V3.B16\n\tVADDP V1.H8, V2.H8, V3.H8\n\tVZIP1 V16.H8, V3.H8, V19.H8\n\tVZIP2 V22.D2, V25.D2, V21.D2\n"+
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"\tVCMEQ V24.S4, V13.S4, V12.S4\n\tVCMEQ $0, V2.H4, V3.H4\n\tVREV32 V2.H8, V1.H8\n\tVREV64 V2.S4, V3.S4\n\tVUADDLV V31.S4, V11\n"+
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"\tVPMULL V2.D1, V1.D1, V3.Q1\n\tVPMULL2 V2.B16, V1.B16, V4.H8\n\tVRAX1 V26.D2, V29.D2, V30.D2\n\tVMOV V2.B16, V4.B16\n")
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want := []uint32{
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0x4e218443, // VADD 16B
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0x4e241c89, // VAND
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0x6e201c20, // VEOR
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0x4ea51c83, // VORR
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0x4e61bc43, // VADDP 8H
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0x4e503873, // VZIP1 8H
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0x4ed67b35, // VZIP2 2D
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0x6eb88dac, // VCMEQ 4S
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0x0e609843, // VCMEQ $0, 4H
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0x6e600841, // VREV32 8H
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0x4ea00843, // VREV64 4S
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0x6eb03beb, // VUADDLV 4S
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0x0ee2e023, // VPMULL D1
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0x4e22e024, // VPMULL2 16B
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0xce7a8fbe, // VRAX1 2D
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0x4ea21c44, // VMOV 16B pair
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0xd65f03c0,
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}
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if len(got) != len(want) {
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t.Fatalf("word count = %d, want %d", len(got), len(want))
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}
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for i := range want {
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if got[i] != want[i] {
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t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
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}
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}
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}
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// TestArm64SIMDWide pins the four-register crypto group, VXAR, VEXT and the
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// shift-by-immediate encodings.
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func TestArm64SIMDWide(t *testing.T) {
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got := arm64Words(t, "\tVEOR3 V2.B16, V7.B16, V12.B16, V25.B16\n\tVBCAX V1.B16, V2.B16, V26.B16, V31.B16\n"+
|
||||
"\tVXAR $63, V27.D2, V21.D2, V26.D2\n\tVEXT $4, V2.B8, V1.B8, V3.B8\n\tVEXT $8, V2.B16, V1.B16, V3.B16\n"+
|
||||
"\tVSHL $7, V22.D2, V25.D2\n\tVUSHR $6, V22.H8, V23.H8\n\tVSRI $24, V1.S4, V2.S4\n")
|
||||
want := []uint32{
|
||||
0xce070999, // VEOR3
|
||||
0xce22075f, // VBCAX
|
||||
0xce9bfeba, // VXAR
|
||||
0x2e022023, // VEXT B8
|
||||
0x6e024023, // VEXT B16
|
||||
0x4f4756d9, // VSHL D2 $7
|
||||
0x6f1a06d7, // VUSHR H8 $6
|
||||
0x6f284422, // VSRI S4 $24
|
||||
0xd65f03c0,
|
||||
}
|
||||
if len(got) != len(want) {
|
||||
t.Fatalf("word count = %d, want %d", len(got), len(want))
|
||||
}
|
||||
for i := range want {
|
||||
if got[i] != want[i] {
|
||||
t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// TestArm64SIMDElement pins VDUP and the VMOV element forms.
|
||||
func TestArm64SIMDElement(t *testing.T) {
|
||||
got := arm64Words(t, "\tVDUP V31.B[15], V18\n\tVDUP V19.S[3], V18.S4\n\tVDUP V1.D[1], V2.D2\n"+
|
||||
"\tVMOV V13.S[0], R20\n\tVMOV V11.B[11], V16.B[12]\n\tVMOV R20, V21.B[2]\n")
|
||||
want := []uint32{
|
||||
0x5e1f07f2, // VDUP element to register
|
||||
0x4e1c0672, // VDUP element across S4
|
||||
0x4e180422, // VDUP element across D2
|
||||
0x0e043db4, // VMOV element to register
|
||||
0x6e195d70, // VMOV element to element
|
||||
0x4e051e95, // VMOV register into element
|
||||
0xd65f03c0,
|
||||
}
|
||||
if len(got) != len(want) {
|
||||
t.Fatalf("word count = %d, want %d", len(got), len(want))
|
||||
}
|
||||
for i := range want {
|
||||
if got[i] != want[i] {
|
||||
t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// TestArm64SIMDLoadStore pins the structure loads and stores.
|
||||
func TestArm64SIMDLoadStore(t *testing.T) {
|
||||
got := arm64Words(t, "\tVLD1 (R2), [V21.B16]\n\tVLD1 (R1), [V2.B16, V3.B16]\n\tVLD1 (R29), [V14.D1, V15.D1, V16.D1, V17.D1]\n"+
|
||||
"\tVLD1.P 32(R1), [V2.B16, V3.B16]\n\tVST1 [V2.S4, V3.S4, V4.S4, V5.S4], (R14)\n\tVST1.P [V2.B16], (R1)\n"+
|
||||
"\tVLD1R (R1), [V9.B8]\n\tVLD4R (R0), [V0.B8, V1.B8, V2.B8, V3.B8]\n")
|
||||
want := []uint32{
|
||||
0x4c407055, // VLD1 one register
|
||||
0x4c40a022, // VLD1 two registers
|
||||
0x0c402fae, // VLD1 four registers D1
|
||||
0x4cdfa022, // VLD1.P two registers
|
||||
0x4c0029c2, // VST1 four registers S4
|
||||
0x4c9f7022, // VST1.P one register
|
||||
0x0d40c029, // VLD1R
|
||||
0x0d60e000, // VLD4R
|
||||
0xd65f03c0,
|
||||
}
|
||||
if len(got) != len(want) {
|
||||
t.Fatalf("word count = %d, want %d", len(got), len(want))
|
||||
}
|
||||
for i := range want {
|
||||
if got[i] != want[i] {
|
||||
t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// TestArm64MoviLiteral pins the VMOVS/VMOVD/VMOVQ constant loads: three
|
||||
// words each (ADRP, ADD, wide load) plus the pooled literal in the data
|
||||
// section.
|
||||
func TestArm64MoviLiteral(t *testing.T) {
|
||||
src := "#include \"textflag.h\"\n\nTEXT ·f(SB), NOSPLIT, $0-0\n" +
|
||||
"\tVMOVS $0x80402010, V11\n\tVMOVD $0x8040201008040201, V20\n" +
|
||||
"\tVMOVQ $0x7040201008040201, $0x8040201008040201, V10\n\tRET\n"
|
||||
f, errs := parser.Parse("test_arm64.s", src)
|
||||
if len(errs) > 0 {
|
||||
t.Fatalf("parse: %v", errs)
|
||||
}
|
||||
img, err := AssembleFileARM64(f)
|
||||
if err != nil {
|
||||
t.Fatalf("AssembleFileARM64: %v", err)
|
||||
}
|
||||
if img.Funcs[0].Size != 12*3+4 {
|
||||
t.Errorf("func size = %d, want %d", img.Funcs[0].Size, 12*3+4)
|
||||
}
|
||||
want := []uint32{
|
||||
0x9000001b, 0x9100037b, 0xbd40036b, // VMOVS: ADRP, ADD, LDR S
|
||||
0x9000001b, 0x9100037b, 0xfd400374, // VMOVD: ADRP, ADD, LDR D
|
||||
0x9000001b, 0x9100037b, 0x3dc0036a, // VMOVQ: ADRP, ADD, LDR Q
|
||||
0xd65f03c0,
|
||||
}
|
||||
got := leWords(img.Code)
|
||||
if len(got) != len(want) {
|
||||
t.Fatalf("word count = %d, want %d", len(got), len(want))
|
||||
}
|
||||
for i := range want {
|
||||
if got[i] != want[i] {
|
||||
t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
|
||||
}
|
||||
}
|
||||
// The literals sit in the data section.
|
||||
var found32, found64, found128 bool
|
||||
for _, d := range img.DataSyms {
|
||||
switch d.Name {
|
||||
case "$i32.80402010":
|
||||
found32 = d.Size == 4
|
||||
case "$i64.8040201008040201":
|
||||
found64 = d.Size == 8
|
||||
case "$i128.80402010080402017040201008040201":
|
||||
found128 = d.Size == 16
|
||||
}
|
||||
}
|
||||
if !found32 || !found64 || !found128 {
|
||||
t.Errorf("literals missing: i32=%v i64=%v i128=%v", found32, found64, found128)
|
||||
}
|
||||
}
|
||||
|
||||
// TestArm64MOVK pins standalone MOVK with the hw field derived from the
|
||||
// chunk position.
|
||||
func TestArm64MOVK(t *testing.T) {
|
||||
got := arm64Words(t, "\tMOVK $1234, R5\n\tMOVK $305397760, R5\n\tMOVKW $1234, R5\n")
|
||||
want := []uint32{
|
||||
0xf2809a45, // MOVK hw=0
|
||||
0xf2a24685, // MOVK hw=1
|
||||
0x72809a45, // MOVKW hw=0
|
||||
0xd65f03c0,
|
||||
}
|
||||
if len(got) != len(want) {
|
||||
t.Fatalf("word count = %d, want %d", len(got), len(want))
|
||||
}
|
||||
for i := range want {
|
||||
if got[i] != want[i] {
|
||||
t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user