fix: restore iota blocks, asm --format flag and prose after the syntax pass
This commit is contained in:
+57
-59
@@ -672,8 +672,6 @@ func encodeLOONG64ImmArith(mnem string, de l64DualEnc, ops []*ast.Operand) ([]by
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const (
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lu12iw = 0x0a << 25
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ori = 0x00e << 22
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lu32id = 0x0b << 25
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lu52id = 0x00c << 22
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)
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if v == int64(int32(v)) {
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if v&0xfff == 0 && (v < 0x800 || v > 0xfff) {
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@@ -771,7 +769,7 @@ func encodeLOONG64Mov(instr *ast.Instr, mnem string, fi loong64FrameInfo, relocs
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if rd < 0 {
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return nil, fmt.Errorf("%s $sym(SB): invalid destination register", mnem)
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}
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return encodeLOONG64SBAddr(src.Imm.Sym, rd, mnem, relocs), nil
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return encodeLOONG64SBAddr(src.Imm.Sym, rd, relocs), nil
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}
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rd := l64Reg(dst)
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if rd < 0 {
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@@ -832,14 +830,14 @@ func encodeLOONG64Mov(instr *ast.Instr, mnem string, fi loong64FrameInfo, relocs
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if rd < 0 {
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return nil, fmt.Errorf("%s: invalid destination register", mnem)
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}
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return encodeLOONG64MemOp(mnem, ops[0], rd, true, fi, relocs)
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return encodeLOONG64MemOp(mnem, ops[0], rd, true, fi)
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}
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if !isMemOperand(src) && isMemOperand(dst) {
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rs := l64Reg(src)
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if rs < 0 {
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return nil, fmt.Errorf("%s: invalid source register", mnem)
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}
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return encodeLOONG64MemOp(mnem, ops[1], rs, false, fi, relocs)
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return encodeLOONG64MemOp(mnem, ops[1], rs, false, fi)
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}
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// Register → register.
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@@ -933,20 +931,20 @@ const (
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l64St1
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l64St0
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l64Dcon12_0
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l64Dcon12_20S
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l64Dcon20S_20
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l64Dcon12_12S
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l64Dcon20S_12S
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l64Dcon20S_0
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l64Dcon12_12U
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l64Dcon20S_12U
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l64Dcon32_12S
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l64Dcon32_0
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l64Dcon32_20
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l64Dcon12_32S
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l64Dcon20S_32
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l64Dcon32_12U
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l64dcon120
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l64dcon1220s
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l64dcon20s20
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l64dcon1212s
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l64dcon20s12s
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l64dcon20s0
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l64dcon1212u
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l64dcon20s12u
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l64dcon3212s
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l64dcon320
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l64dcon3220
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l64dcon1232s
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l64dcon20s32
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l64dcon3212u
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l64Dcon
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)
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@@ -987,91 +985,91 @@ func l64DconClass(v int64) int {
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lo20 := l64BitField(v, 12, 20)
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lo12 := l64BitField(v, 0, 12)
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if tzb >= 52 {
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return l64Dcon12_0
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return l64dcon120
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}
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if tzb >= 32 {
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if ((hi20 == l64All1 || hi20 == l64St1) && hi12 == l64All1) || ((hi20 == l64All0 || hi20 == l64St0) && hi12 == l64All0) {
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return l64Dcon20S_0
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return l64dcon20s0
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}
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return l64Dcon32_0
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return l64dcon320
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}
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if tzb >= 12 {
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if lo20 == l64St1 || lo20 == l64All1 {
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if hi20 == l64All1 {
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return l64Dcon12_20S
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return l64dcon1220s
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}
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if (hi20 == l64St1 && hi12 == l64All1) || ((hi20 == l64St0 || hi20 == l64All0) && hi12 == l64All0) {
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return l64Dcon20S_20
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return l64dcon20s20
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}
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return l64Dcon32_20
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return l64dcon3220
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}
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if hi20 == l64All0 {
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return l64Dcon12_20S
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return l64dcon1220s
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}
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if (hi20 == l64St0 && hi12 == l64All0) || ((hi20 == l64St1 || hi20 == l64All1) && hi12 == l64All1) {
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return l64Dcon20S_20
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return l64dcon20s20
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}
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return l64Dcon32_20
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return l64dcon3220
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}
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if lo12 == l64St1 || lo12 == l64All1 {
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if lo20 == l64All1 {
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if hi20 == l64All1 {
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return l64Dcon12_12S
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return l64dcon1212s
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}
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if (hi20 == l64St1 && hi12 == l64All1) || ((hi20 == l64St0 || hi20 == l64All0) && hi12 == l64All0) {
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return l64Dcon20S_12S
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return l64dcon20s12s
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}
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return l64Dcon32_12S
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return l64dcon3212s
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}
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if lo20 == l64St1 {
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if hi20 == l64All1 {
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return l64Dcon12_32S
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return l64dcon1232s
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}
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if (hi20 == l64St1 && hi12 == l64All1) || ((hi20 == l64St0 || hi20 == l64All0) && hi12 == l64All0) {
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return l64Dcon20S_32
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return l64dcon20s32
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}
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return l64Dcon
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}
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if lo20 == l64All0 {
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if hi20 == l64All0 {
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return l64Dcon12_12U
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return l64dcon1212u
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}
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if ((hi20 == l64St1 || hi20 == l64All1) && hi12 == l64All1) || (hi20 == l64St0 && hi12 == l64All0) {
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return l64Dcon20S_12U
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return l64dcon20s12u
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}
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return l64Dcon32_12U
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return l64dcon3212u
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}
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if hi20 == l64All0 {
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return l64Dcon12_32S
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return l64dcon1232s
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}
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if ((hi20 == l64St1 || hi20 == l64All1) && hi12 == l64All1) || (hi20 == l64St0 && hi12 == l64All0) {
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return l64Dcon20S_32
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return l64dcon20s32
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}
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return l64Dcon
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}
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if lo20 == l64All0 {
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if hi20 == l64All0 {
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return l64Dcon12_12U
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return l64dcon1212u
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}
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if ((hi20 == l64St1 || hi20 == l64All1) && hi12 == l64All1) || (hi20 == l64St0 && hi12 == l64All0) {
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return l64Dcon20S_12U
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return l64dcon20s12u
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}
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return l64Dcon32_12U
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return l64dcon3212u
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}
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if lo20 == l64St1 || lo20 == l64All1 {
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if hi20 == l64All1 {
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return l64Dcon12_32S
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return l64dcon1232s
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}
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if (hi20 == l64St1 && hi12 == l64All1) || ((hi20 == l64St0 || hi20 == l64All0) && hi12 == l64All0) {
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return l64Dcon20S_32
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return l64dcon20s32
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}
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return l64Dcon
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}
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if hi20 == l64All0 {
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return l64Dcon12_32S
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return l64dcon1232s
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}
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if ((hi20 == l64St1 || hi20 == l64All1) && hi12 == l64All1) || (hi20 == l64St0 && hi12 == l64All0) {
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return l64Dcon20S_32
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return l64dcon20s32
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}
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return l64Dcon
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}
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@@ -1088,29 +1086,29 @@ func l64DconMovWords(rd int, v int64) []uint32 {
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ori = 0x00e << 22
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)
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switch l64DconClass(v) {
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case l64Dcon12_0:
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case l64dcon120:
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return []uint32{l64irr(lu52id, int(v>>52), 0, rd)}
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case l64Dcon12_20S:
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case l64dcon1220s:
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return []uint32{l64ir(lu12iw, int(v>>12), rd), l64irr(lu52id, int(v>>52), rd, rd)}
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case l64Dcon20S_20:
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case l64dcon20s20:
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return []uint32{l64ir(lu12iw, int(v>>12), rd), l64ir(lu32id, int(v>>32), rd)}
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case l64Dcon12_12S:
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case l64dcon1212s:
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return []uint32{l64irr(addid, int(v), 0, rd), l64irr(lu52id, int(v>>52), rd, rd)}
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case l64Dcon20S_12S, l64Dcon20S_0:
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case l64dcon20s12s, l64dcon20s0:
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return []uint32{l64irr(addiw, int(v), 0, rd), l64ir(lu32id, int(v>>32), rd)}
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case l64Dcon12_12U:
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case l64dcon1212u:
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return []uint32{l64irr(ori, int(v), 0, rd), l64irr(lu52id, int(v>>52), rd, rd)}
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case l64Dcon20S_12U:
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case l64dcon20s12u:
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return []uint32{l64irr(ori, int(v), 0, rd), l64ir(lu32id, int(v>>32), rd)}
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case l64Dcon32_12S, l64Dcon32_0:
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case l64dcon3212s, l64dcon320:
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return []uint32{l64irr(addiw, int(v), 0, rd), l64ir(lu32id, int(v>>32), rd), l64irr(lu52id, int(v>>52), rd, rd)}
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case l64Dcon32_20:
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case l64dcon3220:
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return []uint32{l64ir(lu12iw, int(v>>12), rd), l64ir(lu32id, int(v>>32), rd), l64irr(lu52id, int(v>>52), rd, rd)}
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case l64Dcon12_32S:
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case l64dcon1232s:
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return []uint32{l64ir(lu12iw, int(v>>12), rd), l64irr(ori, int(v), rd, rd), l64irr(lu52id, int(v>>52), rd, rd)}
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case l64Dcon20S_32:
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case l64dcon20s32:
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return []uint32{l64ir(lu12iw, int(v>>12), rd), l64irr(ori, int(v), rd, rd), l64ir(lu32id, int(v>>32), rd)}
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case l64Dcon32_12U:
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case l64dcon3212u:
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return []uint32{l64irr(ori, int(v), 0, rd), l64ir(lu32id, int(v>>32), rd), l64irr(lu52id, int(v>>52), rd, rd)}
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default:
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return []uint32{l64ir(lu12iw, int(v>>12), rd), l64irr(ori, int(v), rd, rd), l64ir(lu32id, int(v>>32), rd), l64irr(lu52id, int(v>>52), rd, rd)}
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@@ -1161,7 +1159,7 @@ func encodeLOONG64LoadImm(rd int, v int64, mnem string) []byte {
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// encodeLOONG64MemOp encodes a memory load (load = true) or store with a
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// 12-bit offset, or the 3-instruction expansion for larger offsets:
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// lu12i.w r30, (off+0x800)>>12; add.d r30, rj, r30; ld/st rd, off(r30).
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func encodeLOONG64MemOp(mnem string, mem *ast.Operand, reg int, load bool, fi loong64FrameInfo, relocs *[]Reloc) ([]byte, error) {
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func encodeLOONG64MemOp(mnem string, mem *ast.Operand, reg int, load bool, fi loong64FrameInfo) ([]byte, error) {
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rj, off := l64MemWithFrame(mem, fi)
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if rj < 0 {
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return nil, fmt.Errorf("invalid memory operand")
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@@ -1266,7 +1264,7 @@ func l64FpMoveKey(mnem string, sc, dc l64RegClass) (string, bool) {
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// encodeLOONG64SBAddr emits pcalau12i rd, 0; addi.d rd, rd, 0 with the
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// R_LOONG64_ADDR_HI/LO relocation pair, loading a symbol's address.
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func encodeLOONG64SBAddr(sym *ast.Symbol, rd int, mnem string, relocs *[]Reloc) []byte {
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func encodeLOONG64SBAddr(sym *ast.Symbol, rd int, relocs *[]Reloc) []byte {
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if relocs != nil {
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*relocs = append(*relocs,
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Reloc{Off: 0, After: 0, Name: sym.Name, Kind: RelLoong64AddrHi, Addend: sym.Offset},
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