feat(lint): add register-width-mismatch rule

Assisted-by: MiMo V2.5 Pro
2026-08-21 01:20:38 +02:00
parent e4c9d78968
commit 5e06d6a6aa
2 changed files with 108 additions and 13 deletions
@@ -309,3 +309,29 @@ TEXT ·f(SB), NOSPLIT, $16-0
 		t.Fatalf("balanced stack must not be flagged: %+v", diags)
 	}
 }
+
+func TestRegisterWidthMismatch(t *testing.T) {
+	// MOVQ with 32-bit register — mismatch.
+	diags := lintSrc(t, `
+#include "textflag.h"
+TEXT ·f(SB), NOSPLIT, $0
+	MOVQ EAX, BX
+	RET
+`)
+	if codes(diags)[CodeRegisterWidthMismatch] != 1 {
+		t.Fatalf("want one register-width-mismatch, got %+v", diags)
+	}
+}
+
+func TestRegisterWidthCorrect(t *testing.T) {
+	// MOVQ with 64-bit registers — correct.
+	diags := lintSrc(t, `
+#include "textflag.h"
+TEXT ·f(SB), NOSPLIT, $0
+	MOVQ RAX, RBX
+	RET
+`)
+	if codes(diags)[CodeRegisterWidthMismatch] != 0 {
+		t.Fatalf("correct width must not be flagged: %+v", diags)
+	}
+}