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fix(asm): match RISC-V branch and jump encodings

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petrbalvin
2026-08-13 17:57:10 +02:00
parent 31a2cee382
commit 681a449c01
6 changed files with 62 additions and 72 deletions
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asm/riscv_encode.go
-29
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@@ -537,41 +537,12 @@ func rvcCIW(funct3, rd uint32, imm uint32) uint16 {
return uint16((funct3 << 13) | (packed << 5) | (rd << 2))
}
// rvcCJ encodes a CJ-type (jump) compressed instruction.
// offset is a 12-bit signed offset (bit 0 is always 0).
func rvcCJ(funct3 uint32, offset int32) uint16 {
uoff := uint32(offset) & 0xFFE
bits := ((uoff >> 11) & 1) << 10
bits |= ((uoff >> 4) & 1) << 9
bits |= ((uoff >> 9) & 0x3) << 7
bits |= ((uoff >> 10) & 1) << 6
bits |= ((uoff >> 6) & 1) << 5
bits |= ((uoff >> 7) & 1) << 4
bits |= ((uoff >> 1) & 0x7) << 1
bits |= ((uoff >> 5) & 1)
return uint16((funct3 << 13) | (bits << 2) | 0x1)
}
// rvcCA encodes a CA-type (arithmetic) compressed instruction.
// Format: funct6[15:10] | rd'/rs1'[9:7] | funct2[6:5] | rs2'[4:2] | op=01.
func rvcCA(funct6, funct2, rd, rs2 uint32) uint16 {
return uint16((funct6 << 10) | (rd << 7) | (funct2 << 5) | (rs2 << 2) | 0x1)
}
// rvcCB encodes a CB-type (branch) compressed instruction.
// Format: funct3[15:13] | offset[8|4:3] | rs1'[9:7] | offset[7:6|2:1|5] | op=01.
// Bit pattern for offset: [8|4:3|7:6|2:1|5]
func rvcCB(funct3, rs1 uint32, offset int32) uint16 {
uoff := uint32(offset) & 0x1FE // bits [8:1]
offBits := uint32(0)
offBits |= ((uoff >> 8) & 1) << 10 // bit 10 = offset[8]
offBits |= ((uoff >> 3) & 0x3) << 8 // bits 9:8 = offset[4:3]
offBits |= ((uoff >> 6) & 0x3) << 6 // bits 7:6 = offset[7:6]
offBits |= ((uoff >> 1) & 0x3) << 3 // bits 4:3 = offset[2:1]
offBits |= ((uoff >> 5) & 1) << 2 // bit 2 = offset[5]
return uint16((funct3 << 13) | offBits | (rs1 << 7) | 0x1)
}
// rvcCBShift encodes a CB-type shift/immediate compressed instruction
// (C.SRLI, C.SRAI, C.ANDI). rd is the 3-bit prime-register index; imm is
// the 6-bit shamt/immediate; funct2 selects the operation (0=SRLI, 1=SRAI,