feat(asm): add RVC compression for branches, arithmetic, and FP
Assisted-by: DeepSeek V4 Pro
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+9
-8
@@ -489,16 +489,17 @@ func rvcCJ(funct3 uint32, offset int32) uint16 {
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return uint16((funct3 << 13) | (bits << 2) | 0x1)
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}
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// rvcCA encodes a CA-type (arithmetic) compressed instruction.
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// Format: funct6[15:10] | rd'/rs1'[9:7] | funct2[6:5] | rs2'[4:2] | op=01.
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func rvcCA(funct6, funct2, rd, rs2 uint32) uint16 {
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return uint16((funct6 << 10) | (rd << 7) | (funct2 << 5) | (rs2 << 2) | 0x1)
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}
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// rvcCB encodes a CB-type (branch) compressed instruction.
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// imm encodes the 8-bit branch offset (bits [8|4:3|7:6|2:1|5]).
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// Format: funct3[15:13] | offset[8|4:3] | rs1'[9:7] | offset[7:6|2:1|5] | op=01.
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// Bit pattern for offset: [8|4:3|7:6|2:1|5]
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func rvcCB(funct3, rs1 uint32, offset int32) uint16 {
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uoff := uint32(offset) & 0x1FE // bits [8:1]
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bits := ((uoff >> 8) & 1) << 7 // imm[8]
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bits |= ((uoff >> 3) & 0x3) << 5 // imm[4:3]
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bits |= (uoff & 0x7) << 2 // imm[2|1|?]
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// Actually the encoding is more complex. Let me use a simpler approach.
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// CB format: funct3[15:13] | offset[8|4:3] | rs1'[9:7] | offset[7:6|2:1|5] | op[1:0]
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// Bit pattern for offset: [8|4:3|7:6|2:1|5]
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uoff := uint32(offset) & 0x1FE // bits [8:1]
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offBits := uint32(0)
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offBits |= ((uoff >> 8) & 1) << 10 // bit 10 = offset[8]
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offBits |= ((uoff >> 3) & 0x3) << 8 // bits 9:8 = offset[4:3]
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