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feat(arch): the SVE2 BFloat16 arithmetic core

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Assisted-by: GLM 5.3 Flash
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petrbalvin committed 2026-10-07 20:35:41 +02:00
1 parent 0760cc91af
commit 82dbf087a8
4 files changed
+139 -4
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arch/arm64_ext_test.go
+46
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@@ -1505,6 +1505,52 @@ func TestArm64ExtStage4Golden(t *testing.T) {
{"ZEORTB Z7.D, Z23.D, Z13.D", "ZEORTB", ExtFormVectorsZm, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(7, ExtArrD), ExtVector(23, ExtArrD), ExtVector(13, ExtArrD)},
0x45c796ed},
// The BFloat16 arithmetic core, halfwords throughout.
{"ZBF1CVT Z11.B, Z6.H", "ZBF1CVT", ExtFormZUnpack, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(11, ExtArrB), ExtVector(6, ExtArrH)},
0x65083966},
{"ZBF1CVTLT Z11.B, Z6.H", "ZBF1CVTLT", ExtFormZUnpack, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(11, ExtArrB), ExtVector(6, ExtArrH)},
0x65093966},
{"ZBF2CVT Z11.B, Z6.H", "ZBF2CVT", ExtFormZUnpack, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(11, ExtArrB), ExtVector(6, ExtArrH)},
0x65083d66},
{"ZBF2CVTLT Z11.B, Z6.H", "ZBF2CVTLT", ExtFormZUnpack, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(11, ExtArrB), ExtVector(6, ExtArrH)},
0x65093d66},
{"ZBFADD Z23.H, Z13.H, P1.M, Z13.H", "ZBFADD", ExtFormZPredicatedSource, ExtQualMerging, ExtArrH,
[]ExtOperand{ExtVector(23, ExtArrH), ExtVector(13, ExtArrH), ExtPredicate(1, ExtQualMerging), ExtVector(13, ExtArrH)},
0x650086ed},
{"ZBFADD Z7.H, Z6.H, Z23.H", "ZBFADD", ExtFormVectorsZm, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(7, ExtArrH), ExtVector(6, ExtArrH), ExtVector(23, ExtArrH)},
0x650700d7},
{"ZBFCLAMP Z7.H, Z6.H, Z23.H", "ZBFCLAMP", ExtFormVectorsZm, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(7, ExtArrH), ExtVector(6, ExtArrH), ExtVector(23, ExtArrH)},
0x642724d7},
{"ZBFMAX Z23.H, Z13.H, P1.M, Z13.H", "ZBFMAX", ExtFormZPredicatedSource, ExtQualMerging, ExtArrH,
[]ExtOperand{ExtVector(23, ExtArrH), ExtVector(13, ExtArrH), ExtPredicate(1, ExtQualMerging), ExtVector(13, ExtArrH)},
0x650686ed},
{"ZBFMAXNM Z23.H, Z13.H, P1.M, Z13.H", "ZBFMAXNM", ExtFormZPredicatedSource, ExtQualMerging, ExtArrH,
[]ExtOperand{ExtVector(23, ExtArrH), ExtVector(13, ExtArrH), ExtPredicate(1, ExtQualMerging), ExtVector(13, ExtArrH)},
0x650486ed},
{"ZBFMIN Z23.H, Z13.H, P1.M, Z13.H", "ZBFMIN", ExtFormZPredicatedSource, ExtQualMerging, ExtArrH,
[]ExtOperand{ExtVector(23, ExtArrH), ExtVector(13, ExtArrH), ExtPredicate(1, ExtQualMerging), ExtVector(13, ExtArrH)},
0x650786ed},
{"ZBFMINNM Z23.H, Z13.H, P1.M, Z13.H", "ZBFMINNM", ExtFormZPredicatedSource, ExtQualMerging, ExtArrH,
[]ExtOperand{ExtVector(23, ExtArrH), ExtVector(13, ExtArrH), ExtPredicate(1, ExtQualMerging), ExtVector(13, ExtArrH)},
0x650586ed},
{"ZBFMUL Z23.H, Z13.H, P1.M, Z13.H", "ZBFMUL", ExtFormZPredicatedSource, ExtQualMerging, ExtArrH,
[]ExtOperand{ExtVector(23, ExtArrH), ExtVector(13, ExtArrH), ExtPredicate(1, ExtQualMerging), ExtVector(13, ExtArrH)},
0x650286ed},
{"ZBFMUL Z7.H, Z6.H, Z23.H", "ZBFMUL", ExtFormVectorsZm, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(7, ExtArrH), ExtVector(6, ExtArrH), ExtVector(23, ExtArrH)},
0x650708d7},
{"ZBFSUB Z23.H, Z13.H, P1.M, Z13.H", "ZBFSUB", ExtFormZPredicatedSource, ExtQualMerging, ExtArrH,
[]ExtOperand{ExtVector(23, ExtArrH), ExtVector(13, ExtArrH), ExtPredicate(1, ExtQualMerging), ExtVector(13, ExtArrH)},
0x650186ed},
{"ZBFSUB Z7.H, Z6.H, Z23.H", "ZBFSUB", ExtFormVectorsZm, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(7, ExtArrH), ExtVector(6, ExtArrH), ExtVector(23, ExtArrH)},
0x650704d7},
} {
in := extInstructionMeta(t, tt.mnem, tt.form, tt.qual, tt.arr)
got, err := in.Encode(tt.ops)