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feat(arch): the SVE2 BFloat16 arithmetic core

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Assisted-by: GLM 5.3 Flash
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petrbalvin committed 2026-10-07 20:35:41 +02:00
1 parent 0760cc91af
commit 82dbf087a8
4 files changed
+139 -4
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asm/arm64_ext_asm_test.go
+16
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@@ -806,6 +806,22 @@ func TestArm64AssembleExtensionStage4Golden(t *testing.T) {
{"ZBGRP Z7.D, Z23.D, Z13.D", 0x45c7baed},
{"ZEORBT Z7.D, Z23.D, Z13.D", 0x45c792ed},
{"ZEORTB Z7.D, Z23.D, Z13.D", 0x45c796ed},
// The BFloat16 arithmetic core, halfwords throughout.
{"ZBF1CVT Z11.B, Z6.H", 0x65083966},
{"ZBF1CVTLT Z11.B, Z6.H", 0x65093966},
{"ZBF2CVT Z11.B, Z6.H", 0x65083d66},
{"ZBF2CVTLT Z11.B, Z6.H", 0x65093d66},
{"ZBFADD Z23.H, Z13.H, P1.M, Z13.H", 0x650086ed},
{"ZBFADD Z7.H, Z6.H, Z23.H", 0x650700d7},
{"ZBFCLAMP Z7.H, Z6.H, Z23.H", 0x642724d7},
{"ZBFMAX Z23.H, Z13.H, P1.M, Z13.H", 0x650686ed},
{"ZBFMAXNM Z23.H, Z13.H, P1.M, Z13.H", 0x650486ed},
{"ZBFMIN Z23.H, Z13.H, P1.M, Z13.H", 0x650786ed},
{"ZBFMINNM Z23.H, Z13.H, P1.M, Z13.H", 0x650586ed},
{"ZBFMUL Z23.H, Z13.H, P1.M, Z13.H", 0x650286ed},
{"ZBFMUL Z7.H, Z6.H, Z23.H", 0x650708d7},
{"ZBFSUB Z23.H, Z13.H, P1.M, Z13.H", 0x650186ed},
{"ZBFSUB Z7.H, Z6.H, Z23.H", 0x650704d7},
}
for _, tt := range tests {
words := assembleArm64Words(t, arm64ExtProbeHead+"\t"+tt.stmt+"\n\tRET\n")