feat(arch): the SVE2 BFloat16 arithmetic core

Assisted-by: GLM 5.3 Flash

asm/extension_test.go

@@ -315,6 +315,18 @@ func TestExtensionNamesARM64(t *testing.T) {
 		"ZEORBT",
 		"ZEORTB",
 		"ZNBSL",
+		"ZBF1CVT",
+		"ZBF1CVTLT",
+		"ZBF2CVT",
+		"ZBF2CVTLT",
+		"ZBFADD",
+		"ZBFCLAMP",
+		"ZBFMAX",
+		"ZBFMAXNM",
+		"ZBFMIN",
+		"ZBFMINNM",
+		"ZBFMUL",
+		"ZBFSUB",
 		// The stage-three families: the SVE2 crypto group, the predicate
 		// counters and loop terminators with the 32-bit while compares, and
 		// the reductions into a SIMD register.
@@ -427,7 +439,7 @@ func TestExtensionNamesARM64(t *testing.T) {
 	if strings.Join(got, ",") != strings.Join(want, ",") {
 		t.Errorf("ExtensionNames(ARM64) = %v, want %v", got, want)
 	}
-	if n := len(arch.Extensions(arch.ARM64)); n != 425 {
-		t.Errorf("the family registers %d instructions, want 425", n)
+	if n := len(arch.Extensions(arch.ARM64)); n != 440 {
+		t.Errorf("the family registers %d instructions, want 440", n)
 	}
 }