diff --git a/_gen/gen.go b/_gen/gen.go index f7f0b33..9d1420a 100644 --- a/_gen/gen.go +++ b/_gen/gen.go @@ -8,6 +8,10 @@ // names so gasm-devkit supports every instruction the real assembler does, // with no hand-maintained (and therefore inevitably incomplete) lists. // +// The same data feeds the generated instruction appendices of the assembly +// language reference, docs/asm/INSTRUCTIONS-.md, so that the reference +// cannot drift from the tables it documents. +// // Usage (via the justfile): // // just gen @@ -26,6 +30,9 @@ import ( "path/filepath" "sort" "strings" + + "sourcedock.dev/petrbalvin/gasm-devkit/arch" + "sourcedock.dev/petrbalvin/gasm-devkit/asm" ) // archDirs maps a gasm-devkit architecture name to its obj sub-directory. @@ -39,11 +46,30 @@ var archDirs = []struct { {"loong64", "loong64"}, } +// docPages maps an architecture to its generated appendix in the language +// reference. The amd64 page carries a per-mnemonic encodability column, +// decided by asm.Encodable, which mirrors the encoder's own dispatch; the +// other targets have no single cheap predicate, so their pages carry the +// inventory and point at the live measurement instead. +var docPages = []struct { + arch arch.Arch + title string + file string + anames string + encodable bool +}{ + {arch.AMD64, "AMD64", "INSTRUCTIONS-AMD64.md", "cmd/internal/obj/x86/anames.go", true}, + {arch.ARM64, "ARM64", "INSTRUCTIONS-ARM64.md", "cmd/internal/obj/arm64/anames.go", false}, + {arch.RISCV, "RISC-V 64", "INSTRUCTIONS-RISCV64.md", "cmd/internal/obj/riscv/anames.go", false}, + {arch.LOONG64, "LoongArch 64", "INSTRUCTIONS-LOONG64.md", "cmd/internal/obj/loong64/anames.go", false}, +} + func main() { goroot := strings.TrimSpace(runGoEnvGOROOT()) if goroot == "" { fatal("could not determine GOROOT") } + version := strings.TrimSpace(runGoEnv("GOVERSION")) // The common opcodes shared by every architecture (RET, JMP, NOP, CALL, // TEXT, FUNCDATA, …) live in cmd/internal/obj/util.go. commonPath := filepath.Join(goroot, "src", "cmd", "internal", "obj", "util.go") @@ -57,16 +83,24 @@ func main() { } fmt.Printf("%-8s %4d instructions -> arch/common_gen.go\n", "common", len(common)) + names := map[string][]string{} for _, a := range archDirs { path := filepath.Join(goroot, "src", "cmd", "internal", "obj", a.sub, "anames.go") - names, err := extractInstrs(path) + names[a.arch], err = extractInstrs(path) if err != nil { fatal("extract %s: %v", a.arch, err) } - if err := writeGen(a.arch, a.sub, names); err != nil { + if err := writeGen(a.arch, a.sub, names[a.arch]); err != nil { fatal("write %s: %v", a.arch, err) } - fmt.Printf("%-8s %4d instructions -> arch/%s_gen.go\n", a.arch, len(names), a.arch) + fmt.Printf("%-8s %4d instructions -> arch/%s_gen.go\n", a.arch, len(names[a.arch]), a.arch) + } + + for _, p := range docPages { + if err := writeDocPage(p.arch, p.title, p.file, p.anames, version, p.encodable); err != nil { + fatal("write %s: %v", p.file, err) + } + fmt.Printf("%-8s -> docs/asm/%s\n", p.arch, p.file) } } @@ -172,6 +206,61 @@ func writeGen(arch, sub string, names []string) error { return os.WriteFile(filepath.Join("arch", arch+"_gen.go"), []byte(b.String()), 0o644) } +// writeDocPage emits docs/asm/, the generated instruction appendix of +// the language reference for one architecture: every mnemonic the toolchain +// accepts, with the curated summary where the architecture table carries one +// and, on amd64, a per-mnemonic encodability column. +func writeDocPage(a arch.Arch, title, file, anames, version string, encodable bool) error { + table := arch.ForArch(a) + instrs := table.Instructions() + + var b strings.Builder + b.WriteString("# " + title + ": instruction inventory\n\n") + b.WriteString("Generated by gasm-devkit's `_gen` from the Go toolchain's instruction table\n") + b.WriteString("(`" + anames + "`, " + version + "); DO NOT EDIT. This page lists every mnemonic\n") + b.WriteString("`go tool asm` accepts on this target, which is the upper bound of the\n") + b.WriteString("language on it: a name absent here is not an instruction of the target,\n") + b.WriteString("and a name present here may still be one gasm's encoder cannot emit yet.\n\n") + + encodableCount := 0 + if encodable { + b.WriteString("The `gasm encodes` column reports whether gasm's encoder can emit the\n") + b.WriteString("mnemonic today; the gap is the encoder backlog, measured live by\n") + b.WriteString("`gasm audit-instructions`.\n\n") + b.WriteString("| Mnemonic | gasm encodes | Notes |\n") + b.WriteString("|---|---|---|\n") + for _, in := range instrs { + ok := asm.Encodable(in.Name) + if ok { + encodableCount++ + } + b.WriteString("| `" + in.Name + "` | " + yesNo(ok) + " | " + in.Summary + " |\n") + } + b.WriteString("\n") + fmt.Fprintf(&b, "Recognised: %d mnemonics. gasm encodes: %d.\n", len(instrs), encodableCount) + } else { + b.WriteString("The inventory carries no per-mnemonic encoder column: on this target\n") + b.WriteString("encodability is decided per operand shape, and the live measured\n") + b.WriteString("coverage is reported by `gasm audit-instructions`.\n\n") + b.WriteString("| Mnemonic | Notes |\n") + b.WriteString("|---|---|\n") + for _, in := range instrs { + b.WriteString("| `" + in.Name + "` | " + in.Summary + " |\n") + } + b.WriteString("\n") + fmt.Fprintf(&b, "Recognised: %d mnemonics.\n", len(instrs)) + } + return os.WriteFile(filepath.Join("docs", "asm", file), []byte(b.String()), 0o644) +} + +// yesNo renders a boolean as the word the appendix tables use. +func yesNo(v bool) string { + if v { + return "yes" + } + return "no" +} + func runGoEnvGOROOT() string { out, err := exec.Command("go", "env", "GOROOT").Output() if err != nil { @@ -180,6 +269,15 @@ func runGoEnvGOROOT() string { return string(out) } +// runGoEnv runs `go env` for a single variable. +func runGoEnv(name string) string { + out, err := exec.Command("go", "env", name).Output() + if err != nil { + return "" + } + return string(out) +} + func fatal(format string, args ...any) { fmt.Fprintf(os.Stderr, "gen: "+format+"\n", args...) os.Exit(1) diff --git a/docs/asm/INSTRUCTIONS-AMD64.md b/docs/asm/INSTRUCTIONS-AMD64.md new file mode 100644 index 0000000..6c6f842 --- /dev/null +++ b/docs/asm/INSTRUCTIONS-AMD64.md @@ -0,0 +1,1670 @@ +# AMD64: instruction inventory + +Generated by gasm-devkit's `_gen` from the Go toolchain's instruction table +(`cmd/internal/obj/x86/anames.go`, go1.27.1); DO NOT EDIT. This page lists every mnemonic +`go tool asm` accepts on this target, which is the upper bound of the +language on it: a name absent here is not an instruction of the target, +and a name present here may still be one gasm's encoder cannot emit yet. + +The `gasm encodes` column reports whether gasm's encoder can emit the +mnemonic today; the gap is the encoder backlog, measured live by +`gasm audit-instructions`. + +| Mnemonic | gasm encodes | Notes | +|---|---|---| +| `CALL` | yes | Call subroutine | +| `DUFFCOPY` | no | | +| `DUFFZERO` | no | | +| `END` | yes | | +| `FUNCDATA` | yes | | +| `GETCALLERPC` | no | | +| `JMP` | yes | Unconditional jump | +| `NOP` | yes | No operation | +| `PCALIGN` | no | | +| `PCALIGNMAX` | no | | +| `PCDATA` | yes | | +| `RET` | yes | Return from subroutine | +| `TEXT` | no | | +| `UNDEF` | yes | | +| `AAA` | no | | +| `AAD` | no | | +| `AAM` | no | | +| `AAS` | no | | +| `ADCB` | yes | ADC integer | +| `ADCL` | yes | ADC integer | +| `ADCQ` | yes | ADC integer | +| `ADCW` | yes | ADC integer | +| `ADCXL` | yes | | +| `ADCXQ` | yes | | +| `ADDB` | yes | ADD integer | +| `ADDL` | yes | ADD integer | +| `ADDPD` | yes | | +| `ADDPS` | yes | | +| `ADDQ` | yes | ADD integer | +| `ADDSD` | yes | | +| `ADDSS` | yes | | +| `ADDSUBPD` | no | | +| `ADDSUBPS` | no | | +| `ADDW` | yes | ADD integer | +| `ADJSP` | yes | | +| `ADOXL` | yes | | +| `ADOXQ` | yes | | +| `AESDEC` | yes | | +| `AESDECLAST` | yes | | +| `AESENC` | yes | | +| `AESENCLAST` | yes | | +| `AESIMC` | yes | | +| `AESKEYGENASSIST` | yes | | +| `ANDB` | yes | AND integer | +| `ANDL` | yes | AND integer | +| `ANDNL` | yes | | +| `ANDNPD` | yes | | +| `ANDNPS` | yes | | +| `ANDNQ` | yes | | +| `ANDPD` | yes | | +| `ANDPS` | yes | | +| `ANDQ` | yes | AND integer | +| `ANDW` | yes | AND integer | +| `ARPL` | no | | +| `BEXTRL` | yes | | +| `BEXTRQ` | yes | | +| `BLENDPD` | no | | +| `BLENDPS` | no | | +| `BLENDVPD` | no | | +| `BLENDVPS` | no | | +| `BLSIL` | yes | | +| `BLSIQ` | yes | | +| `BLSMSKL` | yes | | +| `BLSMSKQ` | yes | | +| `BLSRL` | yes | | +| `BLSRQ` | yes | | +| `BOUNDL` | no | | +| `BOUNDW` | no | | +| `BSFL` | yes | BSF bit operation | +| `BSFQ` | yes | BSF bit operation | +| `BSFW` | yes | BSF bit operation | +| `BSRL` | yes | BSR bit operation | +| `BSRQ` | yes | BSR bit operation | +| `BSRW` | yes | BSR bit operation | +| `BSWAPL` | yes | Byte-swap | +| `BSWAPQ` | yes | Byte-swap | +| `BTCL` | yes | Bit testTC | +| `BTCQ` | yes | Bit testTC | +| `BTCW` | yes | Bit testTC | +| `BTL` | yes | Bit testT | +| `BTQ` | yes | Bit testT | +| `BTRL` | yes | Bit testTR | +| `BTRQ` | yes | Bit testTR | +| `BTRW` | yes | Bit testTR | +| `BTSL` | yes | Bit testTS | +| `BTSQ` | yes | Bit testTS | +| `BTSW` | yes | Bit testTS | +| `BTW` | yes | Bit testT | +| `BYTE` | yes | | +| `BZHIL` | yes | | +| `BZHIQ` | yes | | +| `CBW` | no | Sign-extend accumulator | +| `CDQ` | no | Sign-extend accumulator | +| `CDQE` | no | Sign-extend accumulator | +| `CLAC` | no | | +| `CLC` | no | | +| `CLD` | yes | | +| `CLDEMOTE` | no | | +| `CLFLUSH` | no | | +| `CLFLUSHOPT` | no | | +| `CLI` | no | | +| `CLTS` | no | | +| `CLWB` | no | | +| `CMC` | no | | +| `CMOVLCC` | yes | | +| `CMOVLCS` | yes | | +| `CMOVLEQ` | yes | Conditional move | +| `CMOVLGE` | yes | Conditional move | +| `CMOVLGT` | yes | Conditional move | +| `CMOVLHI` | yes | | +| `CMOVLLE` | yes | Conditional move | +| `CMOVLLS` | yes | | +| `CMOVLLT` | yes | Conditional move | +| `CMOVLMI` | yes | | +| `CMOVLNE` | yes | Conditional move | +| `CMOVLOC` | yes | | +| `CMOVLOS` | yes | | +| `CMOVLPC` | yes | | +| `CMOVLPL` | yes | | +| `CMOVLPS` | yes | | +| `CMOVQCC` | yes | | +| `CMOVQCS` | yes | | +| `CMOVQEQ` | yes | Conditional move | +| `CMOVQGE` | yes | Conditional move | +| `CMOVQGT` | yes | Conditional move | +| `CMOVQHI` | yes | | +| `CMOVQLE` | yes | Conditional move | +| `CMOVQLS` | yes | | +| `CMOVQLT` | yes | Conditional move | +| `CMOVQMI` | yes | | +| `CMOVQNE` | yes | Conditional move | +| `CMOVQOC` | yes | | +| `CMOVQOS` | yes | | +| `CMOVQPC` | yes | | +| `CMOVQPL` | yes | | +| `CMOVQPS` | yes | | +| `CMOVWCC` | yes | | +| `CMOVWCS` | yes | | +| `CMOVWEQ` | yes | Conditional move | +| `CMOVWGE` | yes | Conditional move | +| `CMOVWGT` | yes | Conditional move | +| `CMOVWHI` | yes | | +| `CMOVWLE` | yes | Conditional move | +| `CMOVWLS` | yes | | +| `CMOVWLT` | yes | Conditional move | +| `CMOVWMI` | yes | | +| `CMOVWNE` | yes | Conditional move | +| `CMOVWOC` | yes | | +| `CMOVWOS` | yes | | +| `CMOVWPC` | yes | | +| `CMOVWPL` | yes | | +| `CMOVWPS` | yes | | +| `CMPB` | yes | Compare (subtract, flags only) | +| `CMPL` | yes | Compare (subtract, flags only) | +| `CMPPD` | no | | +| `CMPPS` | no | | +| `CMPQ` | yes | Compare (subtract, flags only) | +| `CMPSB` | no | | +| `CMPSD` | yes | | +| `CMPSL` | no | | +| `CMPSQ` | no | | +| `CMPSS` | no | | +| `CMPSW` | no | | +| `CMPW` | yes | Compare (subtract, flags only) | +| `CMPXCHG16B` | no | | +| `CMPXCHG8B` | no | | +| `CMPXCHGB` | yes | | +| `CMPXCHGL` | yes | | +| `CMPXCHGQ` | yes | | +| `CMPXCHGW` | yes | | +| `COMISD` | yes | | +| `COMISS` | no | | +| `CPUID` | yes | Serialising/system instruction | +| `CQO` | no | Sign-extend accumulator | +| `CRC32B` | yes | | +| `CRC32L` | yes | | +| `CRC32Q` | yes | | +| `CRC32W` | yes | | +| `CVTPD2PL` | no | | +| `CVTPD2PS` | yes | | +| `CVTPL2PD` | no | | +| `CVTPL2PS` | no | | +| `CVTPS2PD` | yes | | +| `CVTPS2PL` | no | | +| `CVTSD2SL` | yes | | +| `CVTSD2SQ` | yes | | +| `CVTSD2SS` | yes | | +| `CVTSL2SD` | yes | Numeric conversion | +| `CVTSL2SS` | no | Numeric conversion | +| `CVTSQ2SD` | yes | Numeric conversion | +| `CVTSQ2SS` | no | Numeric conversion | +| `CVTSS2SD` | yes | | +| `CVTSS2SL` | yes | | +| `CVTSS2SQ` | yes | | +| `CVTTPD2PL` | no | | +| `CVTTPS2PL` | no | | +| `CVTTSD2SL` | yes | Numeric conversion | +| `CVTTSD2SQ` | yes | Numeric conversion | +| `CVTTSS2SL` | yes | Numeric conversion | +| `CVTTSS2SQ` | yes | | +| `CWD` | no | | +| `CWDE` | no | Sign-extend accumulator | +| `DAA` | no | | +| `DAS` | no | | +| `DECB` | yes | Decrement | +| `DECL` | yes | Decrement | +| `DECQ` | yes | Decrement | +| `DECW` | yes | Decrement | +| `DIVB` | yes | Unsigned divide | +| `DIVL` | yes | Unsigned divide | +| `DIVPD` | yes | | +| `DIVPS` | yes | | +| `DIVQ` | yes | Unsigned divide | +| `DIVSD` | yes | | +| `DIVSS` | yes | | +| `DIVW` | yes | Unsigned divide | +| `DPPD` | no | | +| `DPPS` | no | | +| `EMMS` | no | | +| `ENDBR64` | no | | +| `ENTER` | no | | +| `EXTRACTPS` | no | | +| `F2XM1` | no | | +| `FABS` | no | | +| `FADDD` | no | | +| `FADDDP` | no | | +| `FADDF` | no | | +| `FADDL` | no | | +| `FADDW` | no | | +| `FBLD` | no | | +| `FBSTP` | no | | +| `FCHS` | no | | +| `FCLEX` | no | | +| `FCMOVB` | no | | +| `FCMOVBE` | no | | +| `FCMOVCC` | no | | +| `FCMOVCS` | no | | +| `FCMOVE` | no | | +| `FCMOVEQ` | no | | +| `FCMOVHI` | no | | +| `FCMOVLS` | no | | +| `FCMOVNB` | no | | +| `FCMOVNBE` | no | | +| `FCMOVNE` | no | | +| `FCMOVNU` | no | | +| `FCMOVU` | no | | +| `FCMOVUN` | no | | +| `FCOMD` | no | | +| `FCOMDP` | no | | +| `FCOMDPP` | no | | +| `FCOMF` | no | | +| `FCOMFP` | no | | +| `FCOMI` | no | | +| `FCOMIP` | no | | +| `FCOML` | no | | +| `FCOMLP` | no | | +| `FCOMW` | no | | +| `FCOMWP` | no | | +| `FCOS` | no | | +| `FDECSTP` | no | | +| `FDIVD` | no | | +| `FDIVDP` | no | | +| `FDIVF` | no | | +| `FDIVL` | no | | +| `FDIVRD` | no | | +| `FDIVRDP` | no | | +| `FDIVRF` | no | | +| `FDIVRL` | no | | +| `FDIVRW` | no | | +| `FDIVW` | no | | +| `FFREE` | no | | +| `FINCSTP` | no | | +| `FINIT` | no | | +| `FLD1` | no | | +| `FLDCW` | no | | +| `FLDENV` | no | | +| `FLDL2E` | no | | +| `FLDL2T` | no | | +| `FLDLG2` | no | | +| `FLDLN2` | no | | +| `FLDPI` | no | | +| `FLDZ` | no | | +| `FMOVB` | no | | +| `FMOVBP` | no | | +| `FMOVD` | yes | | +| `FMOVDP` | no | | +| `FMOVF` | no | | +| `FMOVFP` | no | | +| `FMOVL` | no | | +| `FMOVLP` | no | | +| `FMOVV` | no | | +| `FMOVVP` | no | | +| `FMOVW` | no | | +| `FMOVWP` | no | | +| `FMOVX` | no | | +| `FMOVXP` | no | | +| `FMULD` | no | | +| `FMULDP` | no | | +| `FMULF` | no | | +| `FMULL` | no | | +| `FMULW` | no | | +| `FNOP` | no | | +| `FPATAN` | no | | +| `FPREM` | no | | +| `FPREM1` | no | | +| `FPTAN` | no | | +| `FRNDINT` | no | | +| `FRSTOR` | no | | +| `FSAVE` | no | | +| `FSCALE` | no | | +| `FSIN` | no | | +| `FSINCOS` | no | | +| `FSQRT` | no | | +| `FSTCW` | no | | +| `FSTENV` | no | | +| `FSTSW` | no | | +| `FSUBD` | no | | +| `FSUBDP` | no | | +| `FSUBF` | no | | +| `FSUBL` | no | | +| `FSUBRD` | no | | +| `FSUBRDP` | no | | +| `FSUBRF` | no | | +| `FSUBRL` | no | | +| `FSUBRW` | no | | +| `FSUBW` | no | | +| `FTST` | no | | +| `FUCOM` | no | | +| `FUCOMI` | no | | +| `FUCOMIP` | no | | +| `FUCOMP` | no | | +| `FUCOMPP` | no | | +| `FXAM` | no | | +| `FXCHD` | no | | +| `FXRSTOR` | no | | +| `FXRSTOR64` | no | | +| `FXSAVE` | no | | +| `FXSAVE64` | no | | +| `FXTRACT` | no | | +| `FYL2X` | no | | +| `FYL2XP1` | no | | +| `HADDPD` | no | | +| `HADDPS` | no | | +| `HLT` | no | Halt | +| `HSUBPD` | no | | +| `HSUBPS` | no | | +| `ICEBP` | no | | +| `IDIVB` | yes | Signed divide | +| `IDIVL` | yes | Signed divide | +| `IDIVQ` | yes | Signed divide | +| `IDIVW` | yes | Signed divide | +| `IMUL3L` | yes | Signed multiply by immediate | +| `IMUL3Q` | yes | Signed multiply by immediate | +| `IMUL3W` | yes | Signed multiply by immediate | +| `IMULB` | yes | Signed multiply | +| `IMULL` | yes | Signed multiply | +| `IMULQ` | yes | Signed multiply | +| `IMULW` | yes | Signed multiply | +| `INB` | no | | +| `INCB` | yes | Increment | +| `INCL` | yes | Increment | +| `INCQ` | yes | Increment | +| `INCW` | yes | Increment | +| `INL` | no | | +| `INSB` | no | | +| `INSERTPS` | no | | +| `INSL` | no | | +| `INSW` | no | | +| `INT` | yes | Software interrupt | +| `INTO` | no | | +| `INVD` | no | | +| `INVLPG` | no | | +| `INVPCID` | no | | +| `INW` | no | | +| `IRETL` | no | | +| `IRETQ` | no | | +| `IRETW` | no | | +| `JCC` | yes | Conditional jump | +| `JCS` | yes | Conditional jump | +| `JCXZL` | no | | +| `JCXZQ` | no | | +| `JCXZW` | no | | +| `JEQ` | yes | Conditional jump | +| `JGE` | yes | Conditional jump | +| `JGT` | yes | Conditional jump | +| `JHI` | yes | Conditional jump | +| `JLE` | yes | Conditional jump | +| `JLS` | yes | Conditional jump | +| `JLT` | yes | Conditional jump | +| `JMI` | yes | Conditional jump | +| `JNE` | yes | Conditional jump | +| `JOC` | yes | Conditional jump | +| `JOS` | yes | Conditional jump | +| `JPC` | yes | | +| `JPL` | yes | Conditional jump | +| `JPS` | yes | | +| `KADDB` | yes | | +| `KADDD` | yes | | +| `KADDQ` | yes | | +| `KADDW` | yes | | +| `KANDB` | yes | AND masks | +| `KANDD` | yes | AND masks | +| `KANDNB` | yes | AND-NOT masks | +| `KANDND` | yes | AND-NOT masks | +| `KANDNQ` | yes | AND-NOT masks | +| `KANDNW` | yes | AND-NOT masks | +| `KANDQ` | yes | AND masks | +| `KANDW` | yes | AND masks | +| `KMOVB` | yes | Move mask register | +| `KMOVD` | yes | Move mask register | +| `KMOVQ` | yes | Move mask register | +| `KMOVW` | yes | Move mask register | +| `KNOTB` | yes | NOT mask | +| `KNOTD` | yes | NOT mask | +| `KNOTQ` | yes | NOT mask | +| `KNOTW` | yes | NOT mask | +| `KORB` | yes | OR masks | +| `KORD` | yes | OR masks | +| `KORQ` | yes | OR masks | +| `KORTESTB` | yes | | +| `KORTESTD` | yes | | +| `KORTESTQ` | yes | | +| `KORTESTW` | yes | | +| `KORW` | yes | OR masks | +| `KSHIFTLB` | yes | | +| `KSHIFTLD` | yes | | +| `KSHIFTLQ` | yes | | +| `KSHIFTLW` | yes | | +| `KSHIFTRB` | yes | | +| `KSHIFTRD` | yes | | +| `KSHIFTRQ` | yes | | +| `KSHIFTRW` | yes | | +| `KTESTB` | yes | Test mask registers | +| `KTESTD` | yes | Test mask registers | +| `KTESTQ` | yes | Test mask registers | +| `KTESTW` | yes | Test mask registers | +| `KUNPCKBW` | yes | | +| `KUNPCKDQ` | yes | | +| `KUNPCKWD` | yes | | +| `KXNORB` | yes | | +| `KXNORD` | yes | | +| `KXNORQ` | yes | | +| `KXNORW` | yes | | +| `KXORB` | yes | XOR masks | +| `KXORD` | yes | XOR masks | +| `KXORQ` | yes | XOR masks | +| `KXORW` | yes | XOR masks | +| `LAHF` | no | | +| `LARL` | no | | +| `LARQ` | no | | +| `LARW` | no | | +| `LDDQU` | no | | +| `LDMXCSR` | yes | | +| `LEAL` | yes | Load effective address | +| `LEAQ` | yes | Load effective address | +| `LEAVEL` | no | | +| `LEAVEQ` | no | | +| `LEAVEW` | no | | +| `LEAW` | yes | Load effective address | +| `LFENCE` | yes | Serialising/system instruction | +| `LFSL` | no | | +| `LFSQ` | no | | +| `LFSW` | no | | +| `LGDT` | no | | +| `LGSL` | no | | +| `LGSQ` | no | | +| `LGSW` | no | | +| `LIDT` | no | | +| `LLDT` | no | | +| `LMSW` | no | | +| `LOCK` | yes | | +| `LODSB` | no | | +| `LODSL` | no | | +| `LODSQ` | no | | +| `LODSW` | no | | +| `LONG` | yes | | +| `LOOP` | no | | +| `LOOPEQ` | no | | +| `LOOPNE` | no | | +| `LSLL` | no | | +| `LSLQ` | no | | +| `LSLW` | no | | +| `LSSL` | no | | +| `LSSQ` | no | | +| `LSSW` | no | | +| `LTR` | no | | +| `LZCNTL` | yes | LZCNT bit operation | +| `LZCNTQ` | yes | LZCNT bit operation | +| `LZCNTW` | yes | LZCNT bit operation | +| `MASKMOVOU` | no | | +| `MASKMOVQ` | no | | +| `MAXPD` | yes | | +| `MAXPS` | yes | | +| `MAXSD` | yes | | +| `MAXSS` | yes | | +| `MFENCE` | yes | Serialising/system instruction | +| `MINPD` | yes | | +| `MINPS` | yes | | +| `MINSD` | yes | | +| `MINSS` | yes | | +| `MONITOR` | no | | +| `MOVAPD` | yes | SIMD move | +| `MOVAPS` | yes | SIMD move | +| `MOVB` | yes | Move B-width value | +| `MOVBEL` | no | | +| `MOVBEQ` | no | | +| `MOVBEW` | no | | +| `MOVBLSX` | yes | Sign/zero-extending move | +| `MOVBLZX` | yes | Sign/zero-extending move | +| `MOVBQSX` | yes | Sign/zero-extending move | +| `MOVBQZX` | yes | | +| `MOVBWSX` | yes | | +| `MOVBWZX` | yes | | +| `MOVDDUP` | no | | +| `MOVHLPS` | no | | +| `MOVHPD` | no | | +| `MOVHPS` | no | | +| `MOVL` | yes | Move L-width value | +| `MOVLHPS` | no | | +| `MOVLPD` | no | | +| `MOVLPS` | no | | +| `MOVLQSX` | yes | Sign/zero-extending move | +| `MOVLQZX` | yes | | +| `MOVMSKPD` | no | | +| `MOVMSKPS` | no | | +| `MOVNTDQA` | no | | +| `MOVNTIL` | no | | +| `MOVNTIQ` | no | | +| `MOVNTO` | no | | +| `MOVNTPD` | no | | +| `MOVNTPS` | no | | +| `MOVNTQ` | no | | +| `MOVO` | yes | Move 16-byte aligned/unaligned vector | +| `MOVOU` | yes | Move 16-byte aligned/unaligned vector | +| `MOVQ` | yes | Move Q-width value | +| `MOVQL` | no | Sign/zero-extending move | +| `MOVQOZX` | no | | +| `MOVSB` | yes | | +| `MOVSD` | yes | SIMD move | +| `MOVSHDUP` | no | | +| `MOVSL` | yes | | +| `MOVSLDUP` | no | | +| `MOVSQ` | yes | | +| `MOVSS` | yes | SIMD move | +| `MOVSW` | yes | | +| `MOVSWW` | no | | +| `MOVUPD` | yes | SIMD move | +| `MOVUPS` | yes | SIMD move | +| `MOVW` | yes | Move W-width value | +| `MOVWLSX` | yes | Sign/zero-extending move | +| `MOVWLZX` | yes | Sign/zero-extending move | +| `MOVWQSX` | yes | Sign/zero-extending move | +| `MOVWQZX` | yes | | +| `MOVZWW` | no | | +| `MPSADBW` | no | | +| `MULB` | yes | Unsigned multiply | +| `MULL` | yes | Unsigned multiply | +| `MULPD` | yes | | +| `MULPS` | yes | | +| `MULQ` | yes | Unsigned multiply | +| `MULSD` | yes | | +| `MULSS` | yes | | +| `MULW` | yes | Unsigned multiply | +| `MULXL` | yes | | +| `MULXQ` | yes | | +| `MWAIT` | no | | +| `NEGB` | yes | Two's-complement negate | +| `NEGL` | yes | Two's-complement negate | +| `NEGQ` | yes | Two's-complement negate | +| `NEGW` | yes | Two's-complement negate | +| `NOPL` | no | | +| `NOPW` | no | | +| `NOTB` | yes | Bitwise complement | +| `NOTL` | yes | Bitwise complement | +| `NOTQ` | yes | Bitwise complement | +| `NOTW` | yes | Bitwise complement | +| `ORB` | yes | OR integer | +| `ORL` | yes | OR integer | +| `ORPD` | yes | | +| `ORPS` | yes | | +| `ORQ` | yes | OR integer | +| `ORW` | yes | OR integer | +| `OUTB` | no | | +| `OUTL` | no | | +| `OUTSB` | no | | +| `OUTSL` | no | | +| `OUTSW` | no | | +| `OUTW` | no | | +| `PABSB` | no | | +| `PABSD` | no | | +| `PABSW` | no | | +| `PACKSSLW` | no | | +| `PACKSSWB` | no | | +| `PACKUSDW` | no | | +| `PACKUSWB` | no | | +| `PADDB` | yes | | +| `PADDL` | yes | | +| `PADDQ` | yes | | +| `PADDSB` | no | | +| `PADDSW` | no | | +| `PADDUSB` | no | | +| `PADDUSW` | no | | +| `PADDW` | yes | | +| `PALIGNR` | yes | | +| `PAND` | yes | | +| `PANDN` | yes | | +| `PAUSE` | yes | Serialising/system instruction | +| `PAVGB` | no | | +| `PAVGW` | no | | +| `PBLENDVB` | no | | +| `PBLENDW` | yes | | +| `PCLMULQDQ` | yes | | +| `PCMPEQB` | yes | | +| `PCMPEQL` | yes | | +| `PCMPEQQ` | no | | +| `PCMPEQW` | yes | | +| `PCMPESTRI` | yes | | +| `PCMPESTRM` | no | | +| `PCMPGTB` | yes | | +| `PCMPGTL` | no | | +| `PCMPGTQ` | no | | +| `PCMPGTW` | yes | | +| `PCMPISTRI` | no | | +| `PCMPISTRM` | no | | +| `PDEPL` | yes | | +| `PDEPQ` | yes | | +| `PEXTL` | yes | | +| `PEXTQ` | yes | | +| `PEXTRB` | yes | | +| `PEXTRD` | yes | | +| `PEXTRQ` | yes | | +| `PEXTRW` | yes | | +| `PHADDD` | no | | +| `PHADDSW` | no | | +| `PHADDW` | no | | +| `PHMINPOSUW` | no | | +| `PHSUBD` | no | | +| `PHSUBSW` | no | | +| `PHSUBW` | no | | +| `PINSRB` | yes | | +| `PINSRD` | yes | | +| `PINSRQ` | yes | | +| `PINSRW` | yes | | +| `PMADDUBSW` | no | | +| `PMADDWL` | no | | +| `PMAXSB` | no | | +| `PMAXSD` | no | | +| `PMAXSW` | no | | +| `PMAXUB` | no | | +| `PMAXUD` | no | | +| `PMAXUW` | no | | +| `PMINSB` | no | | +| `PMINSD` | no | | +| `PMINSW` | no | | +| `PMINUB` | no | | +| `PMINUD` | no | | +| `PMINUW` | no | | +| `PMOVMSKB` | yes | | +| `PMOVSXBD` | no | | +| `PMOVSXBQ` | no | | +| `PMOVSXBW` | no | | +| `PMOVSXDQ` | no | | +| `PMOVSXWD` | no | | +| `PMOVSXWQ` | no | | +| `PMOVZXBD` | no | | +| `PMOVZXBQ` | no | | +| `PMOVZXBW` | no | | +| `PMOVZXDQ` | no | | +| `PMOVZXWD` | no | | +| `PMOVZXWQ` | no | | +| `PMULDQ` | no | | +| `PMULHRSW` | no | | +| `PMULHUW` | no | | +| `PMULHW` | no | | +| `PMULLD` | no | | +| `PMULLW` | no | | +| `PMULULQ` | no | | +| `POPAL` | no | | +| `POPAW` | no | | +| `POPCNTL` | yes | POPCNT bit operation | +| `POPCNTQ` | yes | POPCNT bit operation | +| `POPCNTW` | yes | POPCNT bit operation | +| `POPFL` | no | | +| `POPFQ` | yes | | +| `POPFW` | no | | +| `POPL` | yes | | +| `POPQ` | yes | | +| `POPW` | yes | | +| `POR` | yes | | +| `PREFETCHNTA` | yes | | +| `PREFETCHT0` | yes | | +| `PREFETCHT1` | yes | | +| `PREFETCHT2` | yes | | +| `PSADBW` | no | | +| `PSHUFB` | yes | | +| `PSHUFD` | yes | Packed/scalar floating point | +| `PSHUFHW` | yes | Packed/scalar floating point | +| `PSHUFL` | yes | | +| `PSHUFLW` | yes | Packed/scalar floating point | +| `PSHUFW` | no | | +| `PSIGNB` | no | | +| `PSIGND` | no | | +| `PSIGNW` | no | | +| `PSLLL` | yes | | +| `PSLLO` | no | | +| `PSLLQ` | yes | | +| `PSLLW` | yes | | +| `PSRAL` | yes | | +| `PSRAW` | yes | | +| `PSRLL` | yes | | +| `PSRLO` | no | | +| `PSRLQ` | yes | | +| `PSRLW` | yes | | +| `PSUBB` | yes | | +| `PSUBL` | yes | | +| `PSUBQ` | yes | | +| `PSUBSB` | no | | +| `PSUBSW` | no | | +| `PSUBUSB` | no | | +| `PSUBUSW` | no | | +| `PSUBW` | yes | | +| `PTEST` | no | | +| `PUNPCKHBW` | no | | +| `PUNPCKHLQ` | no | | +| `PUNPCKHQDQ` | no | | +| `PUNPCKHWL` | no | | +| `PUNPCKLBW` | yes | | +| `PUNPCKLLQ` | no | | +| `PUNPCKLQDQ` | no | | +| `PUNPCKLWL` | no | | +| `PUSHAL` | no | | +| `PUSHAW` | no | | +| `PUSHFL` | no | | +| `PUSHFQ` | yes | | +| `PUSHFW` | no | | +| `PUSHL` | yes | | +| `PUSHQ` | yes | | +| `PUSHW` | yes | | +| `PXOR` | yes | | +| `QUAD` | yes | | +| `RCLB` | yes | RCL shift/rotate | +| `RCLL` | yes | RCL shift/rotate | +| `RCLQ` | yes | RCL shift/rotate | +| `RCLW` | yes | RCL shift/rotate | +| `RCPPS` | no | | +| `RCPSS` | no | | +| `RCRB` | yes | RCR shift/rotate | +| `RCRL` | yes | RCR shift/rotate | +| `RCRQ` | yes | RCR shift/rotate | +| `RCRW` | yes | RCR shift/rotate | +| `RDFSBASEL` | no | | +| `RDFSBASEQ` | no | | +| `RDGSBASEL` | no | | +| `RDGSBASEQ` | no | | +| `RDMSR` | no | | +| `RDPID` | no | | +| `RDPKRU` | no | | +| `RDPMC` | no | | +| `RDRANDL` | no | | +| `RDRANDQ` | no | | +| `RDRANDW` | no | | +| `RDSEEDL` | no | | +| `RDSEEDQ` | no | | +| `RDSEEDW` | no | | +| `RDTSC` | yes | Serialising/system instruction | +| `RDTSCP` | yes | | +| `REP` | yes | | +| `REPN` | yes | | +| `RETFL` | no | | +| `RETFQ` | no | | +| `RETFW` | no | | +| `ROLB` | yes | ROL shift/rotate | +| `ROLL` | yes | ROL shift/rotate | +| `ROLQ` | yes | ROL shift/rotate | +| `ROLW` | yes | ROL shift/rotate | +| `RORB` | yes | ROR shift/rotate | +| `RORL` | yes | ROR shift/rotate | +| `RORQ` | yes | ROR shift/rotate | +| `RORW` | yes | ROR shift/rotate | +| `RORXL` | yes | | +| `RORXQ` | yes | | +| `ROUNDPD` | no | | +| `ROUNDPS` | no | | +| `ROUNDSD` | no | | +| `ROUNDSS` | no | | +| `RSM` | no | | +| `RSQRTPS` | no | | +| `RSQRTSS` | no | | +| `SAHF` | no | | +| `SALB` | yes | SAL shift/rotate | +| `SALL` | yes | SAL shift/rotate | +| `SALQ` | yes | SAL shift/rotate | +| `SALW` | yes | SAL shift/rotate | +| `SARB` | yes | SAR shift/rotate | +| `SARL` | yes | SAR shift/rotate | +| `SARQ` | yes | SAR shift/rotate | +| `SARW` | yes | SAR shift/rotate | +| `SARXL` | yes | | +| `SARXQ` | yes | | +| `SBBB` | yes | SBB integer | +| `SBBL` | yes | SBB integer | +| `SBBQ` | yes | SBB integer | +| `SBBW` | yes | SBB integer | +| `SCASB` | no | | +| `SCASL` | no | | +| `SCASQ` | no | | +| `SCASW` | no | | +| `SETCC` | yes | Set byte on condition | +| `SETCS` | yes | Set byte on condition | +| `SETEQ` | yes | Set byte on condition | +| `SETGE` | yes | Set byte on condition | +| `SETGT` | yes | Set byte on condition | +| `SETHI` | yes | Set byte on condition | +| `SETLE` | yes | Set byte on condition | +| `SETLS` | yes | Set byte on condition | +| `SETLT` | yes | Set byte on condition | +| `SETMI` | yes | Set byte on condition | +| `SETNE` | yes | Set byte on condition | +| `SETOC` | yes | | +| `SETOS` | yes | | +| `SETPC` | yes | | +| `SETPL` | yes | Set byte on condition | +| `SETPS` | yes | | +| `SFENCE` | yes | Serialising/system instruction | +| `SGDT` | no | | +| `SHA1MSG1` | yes | | +| `SHA1MSG2` | yes | | +| `SHA1NEXTE` | yes | | +| `SHA1RNDS4` | yes | | +| `SHA256MSG1` | yes | | +| `SHA256MSG2` | yes | | +| `SHA256RNDS2` | yes | | +| `SHLB` | yes | SHL shift/rotate | +| `SHLL` | yes | SHL shift/rotate | +| `SHLQ` | yes | SHL shift/rotate | +| `SHLW` | yes | SHL shift/rotate | +| `SHLXL` | yes | | +| `SHLXQ` | yes | | +| `SHRB` | yes | SHR shift/rotate | +| `SHRL` | yes | SHR shift/rotate | +| `SHRQ` | yes | SHR shift/rotate | +| `SHRW` | yes | SHR shift/rotate | +| `SHRXL` | yes | | +| `SHRXQ` | yes | | +| `SHUFPD` | yes | Packed/scalar floating point | +| `SHUFPS` | yes | Packed/scalar floating point | +| `SIDT` | no | | +| `SLDTL` | no | | +| `SLDTQ` | no | | +| `SLDTW` | no | | +| `SMSWL` | no | | +| `SMSWQ` | no | | +| `SMSWW` | no | | +| `SQRTPD` | no | | +| `SQRTPS` | no | | +| `SQRTSD` | yes | | +| `SQRTSS` | no | | +| `STAC` | no | | +| `STC` | no | | +| `STD` | yes | | +| `STI` | no | | +| `STMXCSR` | yes | | +| `STOSB` | yes | | +| `STOSL` | yes | | +| `STOSQ` | yes | | +| `STOSW` | yes | | +| `STRL` | no | | +| `STRQ` | no | | +| `STRW` | no | | +| `SUBB` | yes | SUB integer | +| `SUBL` | yes | SUB integer | +| `SUBPD` | yes | | +| `SUBPS` | yes | | +| `SUBQ` | yes | SUB integer | +| `SUBSD` | yes | | +| `SUBSS` | yes | | +| `SUBW` | yes | SUB integer | +| `SWAPGS` | no | | +| `SYSCALL` | yes | System call | +| `SYSENTER` | no | | +| `SYSENTER64` | no | | +| `SYSEXIT` | no | | +| `SYSEXIT64` | no | | +| `SYSRET` | no | | +| `TESTB` | yes | AND, flags only | +| `TESTL` | yes | AND, flags only | +| `TESTQ` | yes | AND, flags only | +| `TESTW` | yes | AND, flags only | +| `TPAUSE` | no | | +| `TZCNTL` | yes | TZCNT bit operation | +| `TZCNTQ` | yes | TZCNT bit operation | +| `TZCNTW` | yes | TZCNT bit operation | +| `UCOMISD` | no | | +| `UCOMISS` | no | | +| `UD1` | no | | +| `UD2` | no | Undefined instruction (trap) | +| `UMONITOR` | no | | +| `UMWAIT` | no | | +| `UNPCKHPD` | yes | Packed/scalar floating point | +| `UNPCKHPS` | yes | Packed/scalar floating point | +| `UNPCKLPD` | yes | Packed/scalar floating point | +| `UNPCKLPS` | yes | Packed/scalar floating point | +| `V4FMADDPS` | yes | | +| `V4FMADDSS` | yes | | +| `V4FNMADDPS` | yes | | +| `V4FNMADDSS` | yes | | +| `VADDPD` | yes | Packed/scalar floating point | +| `VADDPS` | yes | Packed/scalar floating point | +| `VADDSD` | yes | Packed/scalar floating point | +| `VADDSS` | yes | Packed/scalar floating point | +| `VADDSUBPD` | no | | +| `VADDSUBPS` | no | | +| `VAESDEC` | yes | | +| `VAESDECLAST` | yes | | +| `VAESENC` | yes | | +| `VAESENCLAST` | yes | | +| `VAESIMC` | no | | +| `VAESKEYGENASSIST` | no | | +| `VALIGND` | yes | Shuffle / permute / broadcast | +| `VALIGNQ` | yes | Shuffle / permute / broadcast | +| `VANDNPD` | yes | Packed/scalar floating point | +| `VANDNPS` | yes | Packed/scalar floating point | +| `VANDPD` | yes | Packed/scalar floating point | +| `VANDPS` | yes | Packed/scalar floating point | +| `VBLENDMPD` | yes | | +| `VBLENDMPS` | yes | | +| `VBLENDPD` | no | | +| `VBLENDPS` | no | | +| `VBLENDVPD` | no | Shuffle / permute / broadcast | +| `VBLENDVPS` | no | Shuffle / permute / broadcast | +| `VBROADCASTF128` | no | | +| `VBROADCASTF32X2` | yes | | +| `VBROADCASTF32X4` | yes | | +| `VBROADCASTF32X8` | yes | | +| `VBROADCASTF64X2` | yes | | +| `VBROADCASTF64X4` | yes | | +| `VBROADCASTI128` | yes | Shuffle / permute / broadcast | +| `VBROADCASTI32X2` | yes | | +| `VBROADCASTI32X4` | yes | Shuffle / permute / broadcast | +| `VBROADCASTI32X8` | yes | | +| `VBROADCASTI64X2` | yes | | +| `VBROADCASTI64X4` | yes | | +| `VBROADCASTSD` | yes | Shuffle / permute / broadcast | +| `VBROADCASTSS` | yes | Shuffle / permute / broadcast | +| `VCMPPD` | yes | Packed/scalar floating point | +| `VCMPPS` | yes | Packed/scalar floating point | +| `VCMPSD` | yes | Packed/scalar floating point | +| `VCMPSS` | yes | Packed/scalar floating point | +| `VCOMISD` | yes | | +| `VCOMISS` | yes | | +| `VCOMPRESSPD` | yes | | +| `VCOMPRESSPS` | yes | | +| `VCVTDQ2PD` | yes | Numeric conversion | +| `VCVTDQ2PS` | yes | Numeric conversion | +| `VCVTPD2DQ` | yes | Numeric conversion | +| `VCVTPD2DQX` | yes | | +| `VCVTPD2DQY` | yes | | +| `VCVTPD2PS` | yes | Numeric conversion | +| `VCVTPD2PSX` | yes | | +| `VCVTPD2PSY` | yes | | +| `VCVTPD2QQ` | yes | | +| `VCVTPD2UDQ` | yes | | +| `VCVTPD2UDQX` | yes | | +| `VCVTPD2UDQY` | yes | | +| `VCVTPD2UQQ` | yes | | +| `VCVTPH2PS` | yes | | +| `VCVTPS2DQ` | yes | Numeric conversion | +| `VCVTPS2PD` | yes | Numeric conversion | +| `VCVTPS2PH` | yes | | +| `VCVTPS2QQ` | yes | | +| `VCVTPS2UDQ` | yes | | +| `VCVTPS2UQQ` | yes | | +| `VCVTQQ2PD` | yes | Numeric conversion | +| `VCVTQQ2PS` | yes | Numeric conversion | +| `VCVTQQ2PSX` | yes | | +| `VCVTQQ2PSY` | yes | | +| `VCVTSD2SI` | yes | Numeric conversion | +| `VCVTSD2SIQ` | yes | | +| `VCVTSD2SS` | yes | Numeric conversion | +| `VCVTSD2USI` | no | | +| `VCVTSD2USIL` | yes | | +| `VCVTSD2USIQ` | yes | | +| `VCVTSI2SDL` | yes | | +| `VCVTSI2SDQ` | yes | | +| `VCVTSI2SSL` | yes | | +| `VCVTSI2SSQ` | yes | | +| `VCVTSS2SD` | yes | Numeric conversion | +| `VCVTSS2SI` | yes | Numeric conversion | +| `VCVTSS2SIQ` | yes | | +| `VCVTSS2USI` | no | | +| `VCVTSS2USIL` | yes | | +| `VCVTSS2USIQ` | yes | | +| `VCVTTPD2DQ` | yes | Numeric conversion | +| `VCVTTPD2DQX` | yes | | +| `VCVTTPD2DQY` | yes | | +| `VCVTTPD2QQ` | yes | | +| `VCVTTPD2UDQ` | yes | | +| `VCVTTPD2UDQX` | yes | | +| `VCVTTPD2UDQY` | yes | | +| `VCVTTPD2UQQ` | yes | | +| `VCVTTPS2DQ` | yes | Numeric conversion | +| `VCVTTPS2QQ` | yes | | +| `VCVTTPS2UDQ` | yes | | +| `VCVTTPS2UQQ` | yes | | +| `VCVTTSD2SI` | yes | | +| `VCVTTSD2SIQ` | yes | | +| `VCVTTSD2USI` | no | | +| `VCVTTSD2USIL` | yes | | +| `VCVTTSD2USIQ` | yes | | +| `VCVTTSS2SI` | yes | | +| `VCVTTSS2SIQ` | yes | | +| `VCVTTSS2USI` | no | | +| `VCVTTSS2USIL` | yes | | +| `VCVTTSS2USIQ` | yes | | +| `VCVTUDQ2PD` | yes | | +| `VCVTUDQ2PS` | yes | | +| `VCVTUQQ2PD` | yes | Numeric conversion | +| `VCVTUQQ2PS` | yes | Numeric conversion | +| `VCVTUQQ2PSX` | yes | | +| `VCVTUQQ2PSY` | yes | | +| `VCVTUSI2SD` | no | | +| `VCVTUSI2SDL` | yes | | +| `VCVTUSI2SDQ` | yes | | +| `VCVTUSI2SS` | no | | +| `VCVTUSI2SSL` | yes | | +| `VCVTUSI2SSQ` | yes | | +| `VDBPSADBW` | yes | | +| `VDIVPD` | yes | Packed/scalar floating point | +| `VDIVPS` | yes | Packed/scalar floating point | +| `VDIVSD` | yes | Packed/scalar floating point | +| `VDIVSS` | yes | Packed/scalar floating point | +| `VDPPD` | no | | +| `VDPPS` | no | | +| `VERR` | no | | +| `VERW` | no | | +| `VEXP2PD` | yes | | +| `VEXP2PS` | yes | | +| `VEXPANDPD` | yes | | +| `VEXPANDPS` | yes | | +| `VEXTRACTF128` | yes | Shuffle / permute / broadcast | +| `VEXTRACTF32X4` | yes | Shuffle / permute / broadcast | +| `VEXTRACTF32X8` | yes | | +| `VEXTRACTF64X2` | yes | | +| `VEXTRACTF64X4` | yes | Shuffle / permute / broadcast | +| `VEXTRACTI128` | yes | Shuffle / permute / broadcast | +| `VEXTRACTI32X4` | yes | Shuffle / permute / broadcast | +| `VEXTRACTI32X8` | yes | Shuffle / permute / broadcast | +| `VEXTRACTI64X2` | yes | Shuffle / permute / broadcast | +| `VEXTRACTI64X4` | yes | Shuffle / permute / broadcast | +| `VEXTRACTPS` | no | | +| `VFIXUPIMMPD` | yes | | +| `VFIXUPIMMPS` | yes | | +| `VFIXUPIMMSD` | yes | | +| `VFIXUPIMMSS` | yes | | +| `VFMADD132PD` | yes | Fused multiply-add | +| `VFMADD132PS` | yes | Fused multiply-add | +| `VFMADD132SD` | yes | Fused multiply-add | +| `VFMADD132SS` | yes | Fused multiply-add | +| `VFMADD213PD` | yes | Fused multiply-add | +| `VFMADD213PS` | yes | Fused multiply-add | +| `VFMADD213SD` | yes | Fused multiply-add | +| `VFMADD213SS` | yes | Fused multiply-add | +| `VFMADD231PD` | yes | Fused multiply-add | +| `VFMADD231PS` | yes | Fused multiply-add | +| `VFMADD231SD` | yes | Fused multiply-add | +| `VFMADD231SS` | yes | Fused multiply-add | +| `VFMADDSUB132PD` | yes | | +| `VFMADDSUB132PS` | yes | | +| `VFMADDSUB213PD` | yes | | +| `VFMADDSUB213PS` | yes | | +| `VFMADDSUB231PD` | yes | | +| `VFMADDSUB231PS` | yes | | +| `VFMSUB132PD` | yes | Fused multiply-subtract | +| `VFMSUB132PS` | yes | Fused multiply-subtract | +| `VFMSUB132SD` | yes | Fused multiply-subtract | +| `VFMSUB132SS` | yes | Fused multiply-subtract | +| `VFMSUB213PD` | yes | Fused multiply-subtract | +| `VFMSUB213PS` | yes | Fused multiply-subtract | +| `VFMSUB213SD` | yes | Fused multiply-subtract | +| `VFMSUB213SS` | yes | Fused multiply-subtract | +| `VFMSUB231PD` | yes | Fused multiply-subtract | +| `VFMSUB231PS` | yes | Fused multiply-subtract | +| `VFMSUB231SD` | yes | Fused multiply-subtract | +| `VFMSUB231SS` | yes | Fused multiply-subtract | +| `VFMSUBADD132PD` | yes | | +| `VFMSUBADD132PS` | yes | | +| `VFMSUBADD213PD` | yes | | +| `VFMSUBADD213PS` | yes | | +| `VFMSUBADD231PD` | yes | | +| `VFMSUBADD231PS` | yes | | +| `VFNMADD132PD` | yes | Fused negated multiply-add | +| `VFNMADD132PS` | yes | Fused negated multiply-add | +| `VFNMADD132SD` | yes | Fused negated multiply-add | +| `VFNMADD132SS` | yes | Fused negated multiply-add | +| `VFNMADD213PD` | yes | Fused negated multiply-add | +| `VFNMADD213PS` | yes | Fused negated multiply-add | +| `VFNMADD213SD` | yes | Fused negated multiply-add | +| `VFNMADD213SS` | yes | Fused negated multiply-add | +| `VFNMADD231PD` | yes | Fused negated multiply-add | +| `VFNMADD231PS` | yes | Fused negated multiply-add | +| `VFNMADD231SD` | yes | Fused negated multiply-add | +| `VFNMADD231SS` | yes | Fused negated multiply-add | +| `VFNMSUB132PD` | yes | Fused negated multiply-subtract | +| `VFNMSUB132PS` | yes | Fused negated multiply-subtract | +| `VFNMSUB132SD` | yes | Fused negated multiply-subtract | +| `VFNMSUB132SS` | yes | Fused negated multiply-subtract | +| `VFNMSUB213PD` | yes | Fused negated multiply-subtract | +| `VFNMSUB213PS` | yes | Fused negated multiply-subtract | +| `VFNMSUB213SD` | yes | Fused negated multiply-subtract | +| `VFNMSUB213SS` | yes | Fused negated multiply-subtract | +| `VFNMSUB231PD` | yes | Fused negated multiply-subtract | +| `VFNMSUB231PS` | yes | Fused negated multiply-subtract | +| `VFNMSUB231SD` | yes | Fused negated multiply-subtract | +| `VFNMSUB231SS` | yes | Fused negated multiply-subtract | +| `VFPCLASSPD` | no | | +| `VFPCLASSPDX` | yes | | +| `VFPCLASSPDY` | yes | | +| `VFPCLASSPDZ` | yes | | +| `VFPCLASSPS` | no | | +| `VFPCLASSPSX` | yes | | +| `VFPCLASSPSY` | yes | | +| `VFPCLASSPSZ` | yes | | +| `VFPCLASSSD` | yes | | +| `VFPCLASSSS` | yes | | +| `VGATHERDPD` | yes | | +| `VGATHERDPS` | yes | | +| `VGATHERPF0DPD` | no | | +| `VGATHERPF0DPS` | no | | +| `VGATHERPF0QPD` | no | | +| `VGATHERPF0QPS` | no | | +| `VGATHERPF1DPD` | no | | +| `VGATHERPF1DPS` | no | | +| `VGATHERPF1QPD` | no | | +| `VGATHERPF1QPS` | no | | +| `VGATHERQPD` | yes | | +| `VGATHERQPS` | yes | | +| `VGETEXPPD` | yes | | +| `VGETEXPPS` | yes | | +| `VGETEXPSD` | yes | | +| `VGETEXPSS` | yes | | +| `VGETMANTPD` | yes | | +| `VGETMANTPS` | yes | | +| `VGETMANTSD` | yes | | +| `VGETMANTSS` | yes | | +| `VGF2P8AFFINEINVQB` | yes | | +| `VGF2P8AFFINEQB` | yes | | +| `VGF2P8MULB` | yes | | +| `VHADDPD` | no | | +| `VHADDPS` | no | | +| `VHSUBPD` | no | | +| `VHSUBPS` | no | | +| `VINSERTF128` | no | Shuffle / permute / broadcast | +| `VINSERTF32X4` | yes | Shuffle / permute / broadcast | +| `VINSERTF32X8` | yes | | +| `VINSERTF64X2` | yes | | +| `VINSERTF64X4` | yes | Shuffle / permute / broadcast | +| `VINSERTI128` | yes | Shuffle / permute / broadcast | +| `VINSERTI32X4` | yes | Shuffle / permute / broadcast | +| `VINSERTI32X8` | yes | | +| `VINSERTI64X2` | yes | | +| `VINSERTI64X4` | yes | Shuffle / permute / broadcast | +| `VINSERTPS` | no | | +| `VLDDQU` | no | | +| `VLDMXCSR` | no | | +| `VMASKMOVDQU` | no | | +| `VMASKMOVPD` | no | | +| `VMASKMOVPS` | no | | +| `VMAXPD` | yes | Packed/scalar floating point | +| `VMAXPS` | yes | Packed/scalar floating point | +| `VMAXSD` | yes | Packed/scalar floating point | +| `VMAXSS` | yes | Packed/scalar floating point | +| `VMINPD` | yes | Packed/scalar floating point | +| `VMINPS` | yes | Packed/scalar floating point | +| `VMINSD` | yes | Packed/scalar floating point | +| `VMINSS` | yes | Packed/scalar floating point | +| `VMOVAPD` | yes | SIMD move | +| `VMOVAPS` | yes | SIMD move | +| `VMOVD` | yes | SIMD move | +| `VMOVDDUP` | yes | | +| `VMOVDQA` | yes | SIMD move | +| `VMOVDQA32` | yes | SIMD move | +| `VMOVDQA64` | yes | SIMD move | +| `VMOVDQU` | yes | SIMD move | +| `VMOVDQU16` | yes | | +| `VMOVDQU32` | yes | SIMD move | +| `VMOVDQU64` | yes | SIMD move | +| `VMOVDQU8` | yes | | +| `VMOVHLPS` | no | | +| `VMOVHPD` | no | | +| `VMOVHPS` | yes | | +| `VMOVLHPS` | yes | | +| `VMOVLPD` | no | | +| `VMOVLPS` | no | | +| `VMOVMSKPD` | no | Packed extend / truncate / mask | +| `VMOVMSKPS` | yes | Packed extend / truncate / mask | +| `VMOVNTDQ` | yes | | +| `VMOVNTDQA` | yes | | +| `VMOVNTPD` | yes | | +| `VMOVNTPS` | yes | | +| `VMOVQ` | yes | SIMD move | +| `VMOVSD` | yes | SIMD move | +| `VMOVSHDUP` | yes | | +| `VMOVSLDUP` | yes | | +| `VMOVSS` | yes | SIMD move | +| `VMOVUPD` | yes | SIMD move | +| `VMOVUPS` | yes | SIMD move | +| `VMPSADBW` | no | | +| `VMULPD` | yes | Packed/scalar floating point | +| `VMULPS` | yes | Packed/scalar floating point | +| `VMULSD` | yes | Packed/scalar floating point | +| `VMULSS` | yes | Packed/scalar floating point | +| `VORPD` | yes | Packed/scalar floating point | +| `VORPS` | yes | Packed/scalar floating point | +| `VP4DPWSSD` | yes | | +| `VP4DPWSSDS` | yes | | +| `VPABSB` | yes | Packed integer SIMD | +| `VPABSD` | yes | Packed integer SIMD | +| `VPABSQ` | yes | Packed integer SIMD | +| `VPABSW` | yes | Packed integer SIMD | +| `VPACKSSDW` | yes | Packed integer SIMD | +| `VPACKSSWB` | yes | Packed integer SIMD | +| `VPACKUSDW` | yes | Packed integer SIMD | +| `VPACKUSWB` | yes | Packed integer SIMD | +| `VPADDB` | yes | Packed integer SIMD | +| `VPADDD` | yes | Packed integer SIMD | +| `VPADDQ` | yes | Packed integer SIMD | +| `VPADDSB` | yes | | +| `VPADDSW` | yes | | +| `VPADDUSB` | yes | | +| `VPADDUSW` | yes | | +| `VPADDW` | yes | Packed integer SIMD | +| `VPALIGNR` | yes | | +| `VPAND` | yes | Packed integer SIMD | +| `VPANDD` | yes | Packed integer SIMD | +| `VPANDN` | yes | Packed integer SIMD | +| `VPANDND` | yes | Packed integer SIMD | +| `VPANDNQ` | yes | | +| `VPANDQ` | yes | | +| `VPAVGB` | yes | Packed integer SIMD | +| `VPAVGW` | yes | Packed integer SIMD | +| `VPBLENDD` | yes | Shuffle / permute / broadcast | +| `VPBLENDMB` | yes | | +| `VPBLENDMD` | yes | | +| `VPBLENDMQ` | yes | | +| `VPBLENDMW` | yes | | +| `VPBLENDVB` | no | | +| `VPBLENDW` | no | Shuffle / permute / broadcast | +| `VPBROADCASTB` | yes | Shuffle / permute / broadcast | +| `VPBROADCASTD` | yes | Shuffle / permute / broadcast | +| `VPBROADCASTMB2Q` | yes | | +| `VPBROADCASTMW2D` | yes | | +| `VPBROADCASTQ` | yes | Shuffle / permute / broadcast | +| `VPBROADCASTW` | yes | Shuffle / permute / broadcast | +| `VPCLMULQDQ` | yes | | +| `VPCMPB` | yes | Packed compare | +| `VPCMPD` | yes | Packed compare | +| `VPCMPEQB` | yes | Packed compare | +| `VPCMPEQD` | yes | Packed compare | +| `VPCMPEQQ` | yes | Packed compare | +| `VPCMPEQW` | yes | Packed compare | +| `VPCMPESTRI` | no | | +| `VPCMPESTRM` | no | | +| `VPCMPGTB` | yes | Packed compare | +| `VPCMPGTD` | yes | Packed compare | +| `VPCMPGTQ` | yes | Packed compare | +| `VPCMPGTW` | yes | Packed compare | +| `VPCMPISTRI` | no | | +| `VPCMPISTRM` | no | | +| `VPCMPQ` | yes | Packed compare | +| `VPCMPUB` | yes | | +| `VPCMPUD` | yes | | +| `VPCMPUQ` | yes | | +| `VPCMPUW` | yes | | +| `VPCMPW` | yes | Packed compare | +| `VPCOMPRESSB` | yes | | +| `VPCOMPRESSD` | yes | | +| `VPCOMPRESSQ` | yes | | +| `VPCOMPRESSW` | yes | | +| `VPCONFLICTD` | yes | | +| `VPCONFLICTQ` | yes | | +| `VPDPBUSD` | yes | | +| `VPDPBUSDS` | yes | | +| `VPDPWSSD` | yes | | +| `VPDPWSSDS` | yes | | +| `VPERM2F128` | yes | Shuffle / permute / broadcast | +| `VPERM2I128` | yes | Shuffle / permute / broadcast | +| `VPERMB` | yes | | +| `VPERMD` | yes | Shuffle / permute / broadcast | +| `VPERMI2B` | yes | | +| `VPERMI2D` | yes | | +| `VPERMI2PD` | yes | | +| `VPERMI2PS` | yes | | +| `VPERMI2Q` | yes | | +| `VPERMI2W` | yes | | +| `VPERMILPD` | yes | | +| `VPERMILPS` | yes | | +| `VPERMPD` | yes | | +| `VPERMPS` | yes | Shuffle / permute / broadcast | +| `VPERMQ` | yes | Shuffle / permute / broadcast | +| `VPERMT2B` | yes | | +| `VPERMT2D` | yes | | +| `VPERMT2PD` | yes | | +| `VPERMT2PS` | yes | | +| `VPERMT2Q` | yes | | +| `VPERMT2W` | yes | | +| `VPERMW` | yes | | +| `VPEXPANDB` | yes | | +| `VPEXPANDD` | yes | | +| `VPEXPANDQ` | yes | | +| `VPEXPANDW` | yes | | +| `VPEXTRB` | yes | | +| `VPEXTRD` | yes | | +| `VPEXTRQ` | yes | | +| `VPEXTRW` | yes | | +| `VPGATHERDD` | yes | | +| `VPGATHERDQ` | yes | | +| `VPGATHERQD` | yes | | +| `VPGATHERQQ` | yes | | +| `VPHADDD` | no | | +| `VPHADDSW` | no | | +| `VPHADDW` | no | | +| `VPHMINPOSUW` | no | | +| `VPHSUBD` | no | | +| `VPHSUBSW` | no | | +| `VPHSUBW` | no | | +| `VPINSRB` | no | | +| `VPINSRD` | yes | | +| `VPINSRQ` | yes | | +| `VPINSRW` | no | | +| `VPLZCNTD` | yes | | +| `VPLZCNTQ` | yes | | +| `VPMADD52HUQ` | yes | | +| `VPMADD52LUQ` | yes | | +| `VPMADDUBSW` | yes | | +| `VPMADDWD` | yes | | +| `VPMASKMOVD` | no | | +| `VPMASKMOVQ` | no | | +| `VPMAXSB` | yes | Packed integer SIMD | +| `VPMAXSD` | yes | Packed integer SIMD | +| `VPMAXSQ` | yes | | +| `VPMAXSW` | yes | Packed integer SIMD | +| `VPMAXUB` | yes | | +| `VPMAXUD` | yes | | +| `VPMAXUQ` | yes | | +| `VPMAXUW` | yes | | +| `VPMINSB` | yes | Packed integer SIMD | +| `VPMINSD` | yes | Packed integer SIMD | +| `VPMINSQ` | yes | | +| `VPMINSW` | yes | Packed integer SIMD | +| `VPMINUB` | yes | | +| `VPMINUD` | yes | | +| `VPMINUQ` | yes | | +| `VPMINUW` | yes | | +| `VPMOVB2M` | yes | | +| `VPMOVD2M` | yes | | +| `VPMOVDB` | yes | Packed extend / truncate / mask | +| `VPMOVDW` | yes | Packed extend / truncate / mask | +| `VPMOVM2B` | yes | | +| `VPMOVM2D` | yes | | +| `VPMOVM2Q` | yes | | +| `VPMOVM2W` | yes | | +| `VPMOVMSKB` | yes | Packed extend / truncate / mask | +| `VPMOVQ2M` | yes | | +| `VPMOVQB` | yes | Packed extend / truncate / mask | +| `VPMOVQD` | yes | Packed extend / truncate / mask | +| `VPMOVQW` | yes | Packed extend / truncate / mask | +| `VPMOVSDB` | yes | | +| `VPMOVSDW` | yes | | +| `VPMOVSQB` | yes | | +| `VPMOVSQD` | yes | | +| `VPMOVSQW` | yes | | +| `VPMOVSWB` | yes | | +| `VPMOVSXBD` | yes | Packed extend / truncate / mask | +| `VPMOVSXBQ` | yes | Packed extend / truncate / mask | +| `VPMOVSXBW` | yes | Packed extend / truncate / mask | +| `VPMOVSXDQ` | yes | Packed extend / truncate / mask | +| `VPMOVSXWD` | yes | Packed extend / truncate / mask | +| `VPMOVSXWQ` | yes | Packed extend / truncate / mask | +| `VPMOVUSDB` | yes | | +| `VPMOVUSDW` | yes | | +| `VPMOVUSQB` | yes | | +| `VPMOVUSQD` | yes | | +| `VPMOVUSQW` | yes | | +| `VPMOVUSWB` | yes | | +| `VPMOVW2M` | yes | | +| `VPMOVWB` | yes | Packed extend / truncate / mask | +| `VPMOVZXBD` | yes | Packed extend / truncate / mask | +| `VPMOVZXBQ` | yes | Packed extend / truncate / mask | +| `VPMOVZXBW` | yes | Packed extend / truncate / mask | +| `VPMOVZXDQ` | yes | Packed extend / truncate / mask | +| `VPMOVZXWD` | yes | Packed extend / truncate / mask | +| `VPMOVZXWQ` | yes | Packed extend / truncate / mask | +| `VPMULDQ` | yes | Packed integer SIMD | +| `VPMULHRSW` | yes | | +| `VPMULHUW` | yes | Packed integer SIMD | +| `VPMULHW` | yes | Packed integer SIMD | +| `VPMULLD` | yes | Packed integer SIMD | +| `VPMULLQ` | yes | Packed integer SIMD | +| `VPMULLW` | yes | Packed integer SIMD | +| `VPMULTISHIFTQB` | yes | | +| `VPMULUDQ` | yes | Packed integer SIMD | +| `VPOPCNTB` | yes | | +| `VPOPCNTD` | yes | | +| `VPOPCNTQ` | yes | | +| `VPOPCNTW` | yes | | +| `VPOR` | yes | Packed integer SIMD | +| `VPORD` | yes | Packed integer SIMD | +| `VPORQ` | yes | Packed integer SIMD | +| `VPROLD` | yes | | +| `VPROLQ` | yes | | +| `VPROLVD` | yes | | +| `VPROLVQ` | yes | | +| `VPRORD` | yes | | +| `VPRORQ` | yes | | +| `VPRORVD` | yes | | +| `VPRORVQ` | yes | | +| `VPSADBW` | yes | | +| `VPSCATTERDD` | yes | | +| `VPSCATTERDQ` | yes | | +| `VPSCATTERQD` | yes | | +| `VPSCATTERQQ` | yes | | +| `VPSHLDD` | yes | | +| `VPSHLDQ` | yes | | +| `VPSHLDVD` | yes | | +| `VPSHLDVQ` | yes | | +| `VPSHLDVW` | yes | | +| `VPSHLDW` | yes | | +| `VPSHRDD` | yes | | +| `VPSHRDQ` | yes | | +| `VPSHRDVD` | yes | | +| `VPSHRDVQ` | yes | | +| `VPSHRDVW` | yes | | +| `VPSHRDW` | yes | | +| `VPSHUFB` | yes | Shuffle / permute / broadcast | +| `VPSHUFBITQMB` | yes | | +| `VPSHUFD` | yes | Shuffle / permute / broadcast | +| `VPSHUFHW` | yes | Shuffle / permute / broadcast | +| `VPSHUFLW` | yes | Shuffle / permute / broadcast | +| `VPSIGNB` | no | | +| `VPSIGND` | no | | +| `VPSIGNW` | no | | +| `VPSLLD` | yes | Packed integer SIMD | +| `VPSLLDQ` | yes | | +| `VPSLLQ` | yes | Packed integer SIMD | +| `VPSLLVD` | yes | Packed integer SIMD | +| `VPSLLVQ` | yes | Packed integer SIMD | +| `VPSLLVW` | yes | | +| `VPSLLW` | yes | Packed integer SIMD | +| `VPSRAD` | yes | Packed integer SIMD | +| `VPSRAQ` | yes | Packed integer SIMD | +| `VPSRAVD` | yes | Packed integer SIMD | +| `VPSRAVQ` | yes | Packed integer SIMD | +| `VPSRAVW` | yes | | +| `VPSRAW` | yes | Packed integer SIMD | +| `VPSRLD` | yes | Packed integer SIMD | +| `VPSRLDQ` | yes | | +| `VPSRLQ` | yes | Packed integer SIMD | +| `VPSRLVD` | yes | Packed integer SIMD | +| `VPSRLVQ` | yes | Packed integer SIMD | +| `VPSRLVW` | yes | | +| `VPSRLW` | yes | Packed integer SIMD | +| `VPSUBB` | yes | Packed integer SIMD | +| `VPSUBD` | yes | Packed integer SIMD | +| `VPSUBQ` | yes | Packed integer SIMD | +| `VPSUBSB` | yes | | +| `VPSUBSW` | yes | | +| `VPSUBUSB` | yes | Packed integer SIMD | +| `VPSUBUSW` | yes | Packed integer SIMD | +| `VPSUBW` | yes | Packed integer SIMD | +| `VPTERNLOGD` | yes | | +| `VPTERNLOGQ` | yes | | +| `VPTEST` | yes | | +| `VPTESTMB` | yes | | +| `VPTESTMD` | yes | | +| `VPTESTMQ` | yes | | +| `VPTESTMW` | yes | | +| `VPTESTNMB` | yes | | +| `VPTESTNMD` | yes | | +| `VPTESTNMQ` | yes | | +| `VPTESTNMW` | yes | | +| `VPUNPCKHBW` | yes | Shuffle / permute / broadcast | +| `VPUNPCKHDQ` | yes | Shuffle / permute / broadcast | +| `VPUNPCKHQDQ` | yes | Shuffle / permute / broadcast | +| `VPUNPCKHWD` | yes | Shuffle / permute / broadcast | +| `VPUNPCKLBW` | yes | Shuffle / permute / broadcast | +| `VPUNPCKLDQ` | yes | Shuffle / permute / broadcast | +| `VPUNPCKLQDQ` | yes | Shuffle / permute / broadcast | +| `VPUNPCKLWD` | yes | Shuffle / permute / broadcast | +| `VPXOR` | yes | Packed integer SIMD | +| `VPXORD` | yes | Packed integer SIMD | +| `VPXORQ` | yes | Packed integer SIMD | +| `VRANGEPD` | yes | | +| `VRANGEPS` | yes | | +| `VRANGESD` | yes | | +| `VRANGESS` | yes | | +| `VRCP14PD` | yes | | +| `VRCP14PS` | yes | | +| `VRCP14SD` | yes | | +| `VRCP14SS` | yes | | +| `VRCP28PD` | yes | | +| `VRCP28PS` | yes | | +| `VRCP28SD` | yes | | +| `VRCP28SS` | yes | | +| `VRCPPS` | no | Packed/scalar floating point | +| `VRCPSS` | no | | +| `VREDUCEPD` | yes | | +| `VREDUCEPS` | yes | | +| `VREDUCESD` | yes | | +| `VREDUCESS` | yes | | +| `VRNDSCALEPD` | yes | | +| `VRNDSCALEPS` | yes | | +| `VRNDSCALESD` | yes | | +| `VRNDSCALESS` | yes | | +| `VROUNDPD` | no | | +| `VROUNDPS` | no | | +| `VROUNDSD` | no | | +| `VROUNDSS` | no | | +| `VRSQRT14PD` | yes | | +| `VRSQRT14PS` | yes | | +| `VRSQRT14SD` | yes | | +| `VRSQRT14SS` | yes | | +| `VRSQRT28PD` | yes | | +| `VRSQRT28PS` | yes | | +| `VRSQRT28SD` | yes | | +| `VRSQRT28SS` | yes | | +| `VRSQRTPS` | no | Packed/scalar floating point | +| `VRSQRTSS` | no | | +| `VSCALEFPD` | yes | | +| `VSCALEFPS` | yes | | +| `VSCALEFSD` | yes | | +| `VSCALEFSS` | yes | | +| `VSCATTERDPD` | yes | | +| `VSCATTERDPS` | yes | | +| `VSCATTERPF0DPD` | no | | +| `VSCATTERPF0DPS` | no | | +| `VSCATTERPF0QPD` | no | | +| `VSCATTERPF0QPS` | no | | +| `VSCATTERPF1DPD` | no | | +| `VSCATTERPF1DPS` | no | | +| `VSCATTERPF1QPD` | no | | +| `VSCATTERPF1QPS` | no | | +| `VSCATTERQPD` | yes | | +| `VSCATTERQPS` | yes | | +| `VSHUFF32X4` | yes | | +| `VSHUFF64X2` | yes | | +| `VSHUFI32X4` | yes | | +| `VSHUFI64X2` | yes | | +| `VSHUFPD` | yes | Shuffle / permute / broadcast | +| `VSHUFPS` | yes | Shuffle / permute / broadcast | +| `VSQRTPD` | yes | Packed/scalar floating point | +| `VSQRTPS` | yes | Packed/scalar floating point | +| `VSQRTSD` | yes | Packed/scalar floating point | +| `VSQRTSS` | yes | Packed/scalar floating point | +| `VSTMXCSR` | no | | +| `VSUBPD` | yes | Packed/scalar floating point | +| `VSUBPS` | yes | Packed/scalar floating point | +| `VSUBSD` | yes | Packed/scalar floating point | +| `VSUBSS` | yes | Packed/scalar floating point | +| `VTESTPD` | no | | +| `VTESTPS` | no | | +| `VUCOMISD` | yes | | +| `VUCOMISS` | yes | | +| `VUNPCKHPD` | yes | Packed/scalar floating point | +| `VUNPCKHPS` | yes | Packed/scalar floating point | +| `VUNPCKLPD` | yes | Packed/scalar floating point | +| `VUNPCKLPS` | yes | Packed/scalar floating point | +| `VXORPD` | yes | Packed/scalar floating point | +| `VXORPS` | yes | Packed/scalar floating point | +| `VZEROALL` | yes | Zero all YMM/ZMM state | +| `VZEROUPPER` | yes | Zero upper halves of YMM/ZMM | +| `WAIT` | no | | +| `WBINVD` | no | | +| `WORD` | yes | | +| `WRFSBASEL` | no | | +| `WRFSBASEQ` | no | | +| `WRGSBASEL` | no | | +| `WRGSBASEQ` | no | | +| `WRMSR` | no | | +| `WRPKRU` | no | | +| `XABORT` | no | | +| `XACQUIRE` | no | | +| `XADDB` | yes | | +| `XADDL` | yes | | +| `XADDQ` | yes | | +| `XADDW` | yes | | +| `XBEGIN` | no | | +| `XCHGB` | yes | Exchange operands | +| `XCHGL` | yes | Exchange operands | +| `XCHGQ` | yes | Exchange operands | +| `XCHGW` | yes | Exchange operands | +| `XEND` | no | | +| `XGETBV` | yes | | +| `XLAT` | no | | +| `XORB` | yes | XOR integer | +| `XORL` | yes | XOR integer | +| `XORPD` | yes | | +| `XORPS` | yes | | +| `XORQ` | yes | XOR integer | +| `XORW` | yes | XOR integer | +| `XRELEASE` | no | | +| `XRSTOR` | no | | +| `XRSTOR64` | no | | +| `XRSTORS` | no | | +| `XRSTORS64` | no | | +| `XSAVE` | no | | +| `XSAVE64` | no | | +| `XSAVEC` | no | | +| `XSAVEC64` | no | | +| `XSAVEOPT` | no | | +| `XSAVEOPT64` | no | | +| `XSAVES` | no | | +| `XSAVES64` | no | | +| `XSETBV` | no | | +| `XTEST` | no | | +| `JA` | yes | Conditional jump | +| `JAE` | yes | Conditional jump | +| `JB` | yes | Conditional jump | +| `JBE` | yes | Conditional jump | +| `JC` | yes | Conditional jump | +| `JE` | yes | | +| `JG` | yes | Conditional jump | +| `JHS` | no | | +| `JL` | yes | Conditional jump | +| `JLO` | no | | +| `JNA` | yes | | +| `JNAE` | yes | | +| `JNB` | yes | | +| `JNBE` | yes | | +| `JNC` | yes | Conditional jump | +| `JNG` | yes | | +| `JNGE` | yes | | +| `JNL` | yes | | +| `JNLE` | yes | | +| `JNO` | yes | Conditional jump | +| `JNP` | yes | Conditional jump | +| `JNS` | yes | Conditional jump | +| `JNZ` | yes | Conditional jump | +| `JO` | yes | Conditional jump | +| `JP` | yes | Conditional jump | +| `JPE` | yes | Conditional jump | +| `JPO` | yes | Conditional jump | +| `JS` | yes | Conditional jump | +| `JZ` | yes | Conditional jump | +| `MASKMOVDQU` | no | | +| `MOVDQ2Q` | no | | +| `MOVNTDQ` | no | | +| `MOVOA` | yes | | +| `PSLLDQ` | yes | | +| `PSRLDQ` | yes | | +| `MOVD` | yes | SIMD move | +| `PADDD` | yes | | +| `MOVBELL` | no | | +| `MOVBEQQ` | no | | +| `MOVBEWW` | no | | + +Recognised: 1654 mnemonics. gasm encodes: 1113. diff --git a/docs/asm/INSTRUCTIONS-ARM64.md b/docs/asm/INSTRUCTIONS-ARM64.md new file mode 100644 index 0000000..7cd344c --- /dev/null +++ b/docs/asm/INSTRUCTIONS-ARM64.md @@ -0,0 +1,570 @@ +# ARM64: instruction inventory + +Generated by gasm-devkit's `_gen` from the Go toolchain's instruction table +(`cmd/internal/obj/arm64/anames.go`, go1.27.1); DO NOT EDIT. This page lists every mnemonic +`go tool asm` accepts on this target, which is the upper bound of the +language on it: a name absent here is not an instruction of the target, +and a name present here may still be one gasm's encoder cannot emit yet. + +The inventory carries no per-mnemonic encoder column: on this target +encodability is decided per operand shape, and the live measured +coverage is reported by `gasm audit-instructions`. + +| Mnemonic | Notes | +|---|---| +| `CALL` | | +| `DUFFCOPY` | | +| `DUFFZERO` | | +| `END` | | +| `FUNCDATA` | | +| `GETCALLERPC` | | +| `JMP` | | +| `NOP` | No operation | +| `PCALIGN` | | +| `PCALIGNMAX` | | +| `PCDATA` | | +| `RET` | Return | +| `TEXT` | | +| `UNDEF` | | +| `ADC` | ADC (64-bit) | +| `ADCS` | ADCS (64-bit) | +| `ADCSW` | ADCS (32-bit) | +| `ADCW` | ADC (32-bit) | +| `ADD` | ADD (64-bit) | +| `ADDS` | ADDS (64-bit) | +| `ADDSW` | ADDS (32-bit) | +| `ADDW` | ADD (32-bit) | +| `ADR` | Address of label/page | +| `ADRP` | Address of label/page | +| `AESD` | AES round | +| `AESE` | AES round | +| `AESIMC` | AES round | +| `AESMC` | AES round | +| `AND` | AND (64-bit) | +| `ANDS` | ANDS (64-bit) | +| `ANDSW` | ANDS (32-bit) | +| `ANDW` | AND (32-bit) | +| `ASR` | ASR shift | +| `ASRW` | ASR shift (32-bit) | +| `AT` | | +| `AUTIA1716` | | +| `AUTIASP` | | +| `AUTIB1716` | | +| `AUTIBSP` | | +| `BCC` | Conditional branch | +| `BCS` | Conditional branch | +| `BEQ` | Conditional branch | +| `BFI` | | +| `BFIW` | | +| `BFM` | | +| `BFMW` | | +| `BFXIL` | Bitfield extract | +| `BFXILW` | | +| `BGE` | Conditional branch | +| `BGT` | Conditional branch | +| `BHI` | Conditional branch | +| `BHS` | Conditional branch | +| `BIC` | BIC (64-bit) | +| `BICS` | BICS (64-bit) | +| `BICSW` | BICS (32-bit) | +| `BICW` | BIC (32-bit) | +| `BLE` | Conditional branch | +| `BLO` | Conditional branch | +| `BLS` | Conditional branch | +| `BLT` | Conditional branch | +| `BMI` | Conditional branch | +| `BNE` | Conditional branch | +| `BPL` | Conditional branch | +| `BRK` | Breakpoint | +| `BTI` | | +| `BVC` | Conditional branch | +| `BVS` | Conditional branch | +| `CASAD` | | +| `CASALB` | | +| `CASALD` | | +| `CASALH` | | +| `CASALW` | | +| `CASAW` | | +| `CASB` | | +| `CASD` | | +| `CASH` | | +| `CASLD` | | +| `CASLW` | | +| `CASPD` | | +| `CASPW` | | +| `CASW` | | +| `CBNZ` | Compare/test and branch | +| `CBNZW` | Compare/test and branch (32-bit) | +| `CBZ` | Compare/test and branch | +| `CBZW` | Compare/test and branch (32-bit) | +| `CCMN` | Conditional compare | +| `CCMNW` | Conditional compare | +| `CCMP` | Conditional compare | +| `CCMPW` | Conditional compare | +| `CINC` | Conditional select | +| `CINCW` | Conditional select (32-bit) | +| `CINV` | Conditional select | +| `CINVW` | Conditional select (32-bit) | +| `CLREX` | | +| `CLS` | Bit manipulation | +| `CLSW` | Bit manipulation | +| `CLZ` | Bit manipulation | +| `CLZW` | Bit manipulation | +| `CMN` | CMN (64-bit) | +| `CMNW` | CMN (32-bit) | +| `CMP` | CMP (64-bit) | +| `CMPW` | CMP (32-bit) | +| `CNEG` | Conditional select | +| `CNEGW` | Conditional select (32-bit) | +| `CRC32B` | | +| `CRC32CB` | | +| `CRC32CH` | | +| `CRC32CW` | | +| `CRC32CX` | | +| `CRC32H` | | +| `CRC32W` | | +| `CRC32X` | | +| `CSEL` | Conditional select | +| `CSELW` | Conditional select (32-bit) | +| `CSET` | Conditional select | +| `CSETM` | Conditional select | +| `CSETMW` | Conditional select (32-bit) | +| `CSETW` | Conditional select (32-bit) | +| `CSINC` | Conditional select | +| `CSINCW` | Conditional select (32-bit) | +| `CSINV` | Conditional select | +| `CSINVW` | Conditional select (32-bit) | +| `CSNEG` | Conditional select | +| `CSNEGW` | Conditional select (32-bit) | +| `DC` | Data cache maintenance | +| `DCPS1` | | +| `DCPS2` | | +| `DCPS3` | | +| `DMB` | Barrier | +| `DRPS` | | +| `DSB` | Barrier | +| `DWORD` | | +| `EON` | EON (64-bit) | +| `EONW` | EON (32-bit) | +| `EOR` | EOR (64-bit) | +| `EORW` | EOR (32-bit) | +| `ERET` | | +| `EXTR` | Bitfield extract | +| `EXTRW` | | +| `FABSD` | | +| `FABSS` | | +| `FADDD` | | +| `FADDS` | | +| `FCCMPD` | | +| `FCCMPED` | | +| `FCCMPES` | | +| `FCCMPS` | | +| `FCMPD` | | +| `FCMPED` | | +| `FCMPES` | | +| `FCMPS` | | +| `FCSELD` | | +| `FCSELS` | | +| `FCVTDH` | | +| `FCVTDS` | | +| `FCVTHD` | | +| `FCVTHS` | | +| `FCVTSD` | | +| `FCVTSH` | | +| `FCVTZSD` | | +| `FCVTZSDW` | | +| `FCVTZSS` | | +| `FCVTZSSW` | | +| `FCVTZUD` | | +| `FCVTZUDW` | | +| `FCVTZUS` | | +| `FCVTZUSW` | | +| `FDIVD` | | +| `FDIVS` | | +| `FLDPD` | Register-pair load or store | +| `FLDPQ` | | +| `FLDPS` | | +| `FMADDD` | | +| `FMADDS` | | +| `FMAXD` | | +| `FMAXNMD` | | +| `FMAXNMS` | | +| `FMAXS` | | +| `FMIND` | | +| `FMINNMD` | | +| `FMINNMS` | | +| `FMINS` | | +| `FMOVD` | Move / load / store | +| `FMOVQ` | | +| `FMOVS` | Move / load / store | +| `FMSUBD` | | +| `FMSUBS` | | +| `FMULD` | | +| `FMULS` | | +| `FNEGD` | | +| `FNEGS` | | +| `FNMADDD` | | +| `FNMADDS` | | +| `FNMSUBD` | | +| `FNMSUBS` | | +| `FNMULD` | | +| `FNMULS` | | +| `FRINTAD` | | +| `FRINTAS` | | +| `FRINTID` | | +| `FRINTIS` | | +| `FRINTMD` | | +| `FRINTMS` | | +| `FRINTND` | | +| `FRINTNS` | | +| `FRINTPD` | | +| `FRINTPS` | | +| `FRINTXD` | | +| `FRINTXS` | | +| `FRINTZD` | | +| `FRINTZS` | | +| `FSQRTD` | | +| `FSQRTS` | | +| `FSTPD` | Register-pair load or store | +| `FSTPQ` | | +| `FSTPS` | | +| `FSUBD` | | +| `FSUBS` | | +| `HINT` | | +| `HLT` | | +| `HVC` | Exception generation | +| `IC` | | +| `ISB` | Barrier | +| `LDADDAB` | | +| `LDADDAD` | | +| `LDADDAH` | | +| `LDADDALB` | | +| `LDADDALD` | | +| `LDADDALH` | | +| `LDADDALW` | | +| `LDADDAW` | | +| `LDADDB` | | +| `LDADDD` | | +| `LDADDH` | | +| `LDADDLB` | | +| `LDADDLD` | | +| `LDADDLH` | | +| `LDADDLW` | | +| `LDADDW` | | +| `LDAR` | Atomic memory operation | +| `LDARB` | Atomic memory operation | +| `LDARH` | Atomic memory operation | +| `LDARW` | Atomic memory operation | +| `LDAXP` | | +| `LDAXPW` | | +| `LDAXR` | Atomic memory operation | +| `LDAXRB` | Atomic memory operation | +| `LDAXRH` | Atomic memory operation | +| `LDAXRW` | Atomic memory operation | +| `LDCLRAB` | | +| `LDCLRAD` | | +| `LDCLRAH` | | +| `LDCLRALB` | | +| `LDCLRALD` | | +| `LDCLRALH` | | +| `LDCLRALW` | | +| `LDCLRAW` | | +| `LDCLRB` | | +| `LDCLRD` | | +| `LDCLRH` | | +| `LDCLRLB` | | +| `LDCLRLD` | | +| `LDCLRLH` | | +| `LDCLRLW` | | +| `LDCLRW` | | +| `LDEORAB` | | +| `LDEORAD` | | +| `LDEORAH` | | +| `LDEORALB` | | +| `LDEORALD` | | +| `LDEORALH` | | +| `LDEORALW` | | +| `LDEORAW` | | +| `LDEORB` | | +| `LDEORD` | | +| `LDEORH` | | +| `LDEORLB` | | +| `LDEORLD` | | +| `LDEORLH` | | +| `LDEORLW` | | +| `LDEORW` | | +| `LDORAB` | | +| `LDORAD` | | +| `LDORAH` | | +| `LDORALB` | | +| `LDORALD` | | +| `LDORALH` | | +| `LDORALW` | | +| `LDORAW` | | +| `LDORB` | | +| `LDORD` | | +| `LDORH` | | +| `LDORLB` | | +| `LDORLD` | | +| `LDORLH` | | +| `LDORLW` | | +| `LDORW` | | +| `LDP` | Register-pair load or store | +| `LDPSW` | | +| `LDPW` | Register-pair load or store | +| `LDXP` | | +| `LDXPW` | | +| `LDXR` | | +| `LDXRB` | | +| `LDXRH` | | +| `LDXRW` | | +| `LSL` | LSL shift | +| `LSLW` | LSL shift (32-bit) | +| `LSR` | LSR shift | +| `LSRW` | LSR shift (32-bit) | +| `MADD` | Multiply / multiply-accumulate | +| `MADDW` | | +| `MNEG` | Multiply / multiply-accumulate | +| `MNEGW` | | +| `MOVB` | Move / load / store | +| `MOVBU` | Move / load / store | +| `MOVD` | Move / load / store | +| `MOVH` | Move / load / store | +| `MOVHU` | Move / load / store | +| `MOVK` | Move wide constant | +| `MOVKW` | Move wide constant | +| `MOVN` | Move wide constant | +| `MOVNW` | Move wide constant | +| `MOVP` | | +| `MOVPD` | | +| `MOVPQ` | | +| `MOVPS` | | +| `MOVPSW` | | +| `MOVPW` | | +| `MOVW` | Move / load / store | +| `MOVWU` | Move / load / store | +| `MOVZ` | Move wide constant | +| `MOVZW` | Move wide constant | +| `MRS` | System register access | +| `MSR` | System register access | +| `MSUB` | Multiply / multiply-accumulate | +| `MSUBW` | | +| `MUL` | Multiply / multiply-accumulate | +| `MULW` | | +| `MVN` | MVN (64-bit) | +| `MVNW` | MVN (32-bit) | +| `NEG` | NEG (64-bit) | +| `NEGS` | | +| `NEGSW` | | +| `NEGW` | NEG (32-bit) | +| `NGC` | NGC (64-bit) | +| `NGCS` | | +| `NGCSW` | | +| `NGCW` | NGC (32-bit) | +| `NOOP` | | +| `ORN` | ORN (64-bit) | +| `ORNW` | ORN (32-bit) | +| `ORR` | ORR (64-bit) | +| `ORRW` | ORR (32-bit) | +| `PACIASP` | | +| `PACIBSP` | | +| `PRFM` | Memory prefetch | +| `PRFUM` | | +| `RBIT` | Bit manipulation | +| `RBITW` | Bit manipulation | +| `REM` | | +| `REMW` | | +| `REV` | Bit manipulation | +| `REV16` | Bit manipulation | +| `REV16W` | | +| `REV32` | Bit manipulation | +| `REVW` | Bit manipulation | +| `ROR` | ROR shift | +| `RORW` | ROR shift (32-bit) | +| `SBC` | SBC (64-bit) | +| `SBCS` | SBCS (64-bit) | +| `SBCSW` | SBCS (32-bit) | +| `SBCW` | SBC (32-bit) | +| `SBFIZ` | | +| `SBFIZW` | | +| `SBFM` | Bitfield extract | +| `SBFMW` | | +| `SBFX` | Bitfield extract | +| `SBFXW` | | +| `SCVTFD` | | +| `SCVTFS` | | +| `SCVTFWD` | | +| `SCVTFWS` | | +| `SDIV` | Divide | +| `SDIVW` | Divide | +| `SEV` | | +| `SEVL` | | +| `SHA1C` | SHA round | +| `SHA1H` | SHA round | +| `SHA1M` | SHA round | +| `SHA1P` | SHA round | +| `SHA1SU0` | SHA round | +| `SHA1SU1` | SHA round | +| `SHA256H` | SHA round | +| `SHA256H2` | SHA round | +| `SHA256SU0` | SHA round | +| `SHA256SU1` | SHA round | +| `SHA512H` | SHA round | +| `SHA512H2` | SHA round | +| `SHA512SU0` | SHA round | +| `SHA512SU1` | SHA round | +| `SMADDL` | Multiply / multiply-accumulate | +| `SMC` | Exception generation | +| `SMNEGL` | | +| `SMSUBL` | Multiply / multiply-accumulate | +| `SMULH` | Multiply / multiply-accumulate | +| `SMULL` | Multiply / multiply-accumulate | +| `STLR` | Atomic memory operation | +| `STLRB` | Atomic memory operation | +| `STLRH` | Atomic memory operation | +| `STLRW` | Atomic memory operation | +| `STLXP` | | +| `STLXPW` | | +| `STLXR` | | +| `STLXRB` | | +| `STLXRH` | | +| `STLXRW` | | +| `STP` | Register-pair load or store | +| `STPW` | Register-pair load or store | +| `STXP` | | +| `STXPW` | | +| `STXR` | Atomic memory operation | +| `STXRB` | Atomic memory operation | +| `STXRH` | Atomic memory operation | +| `STXRW` | Atomic memory operation | +| `SUB` | SUB (64-bit) | +| `SUBS` | SUBS (64-bit) | +| `SUBSW` | SUBS (32-bit) | +| `SUBW` | SUB (32-bit) | +| `SVC` | Exception generation | +| `SWPAB` | | +| `SWPAD` | | +| `SWPAH` | | +| `SWPALB` | | +| `SWPALD` | | +| `SWPALH` | | +| `SWPALW` | | +| `SWPAW` | | +| `SWPB` | | +| `SWPD` | | +| `SWPH` | | +| `SWPLB` | | +| `SWPLD` | | +| `SWPLH` | | +| `SWPLW` | | +| `SWPW` | | +| `SXTB` | | +| `SXTBW` | | +| `SXTH` | | +| `SXTHW` | | +| `SXTW` | | +| `SYS` | | +| `SYSL` | | +| `TBNZ` | Compare/test and branch | +| `TBZ` | Compare/test and branch | +| `TLBI` | | +| `TST` | TST (64-bit) | +| `TSTW` | TST (32-bit) | +| `UBFIZ` | | +| `UBFIZW` | | +| `UBFM` | Bitfield extract | +| `UBFMW` | | +| `UBFX` | Bitfield extract | +| `UBFXW` | | +| `UCVTFD` | | +| `UCVTFS` | | +| `UCVTFWD` | | +| `UCVTFWS` | | +| `UDIV` | Divide | +| `UDIVW` | Divide | +| `UMADDL` | Multiply / multiply-accumulate | +| `UMNEGL` | | +| `UMSUBL` | Multiply / multiply-accumulate | +| `UMULH` | Multiply / multiply-accumulate | +| `UMULL` | Multiply / multiply-accumulate | +| `UREM` | | +| `UREMW` | | +| `UXTB` | | +| `UXTBW` | | +| `UXTH` | | +| `UXTHW` | | +| `UXTW` | | +| `VADD` | NEON SIMD vector operation | +| `VADDP` | | +| `VADDV` | NEON SIMD vector operation | +| `VAND` | NEON SIMD vector operation | +| `VBCAX` | Three-way XOR / rotate crypto vector operation | +| `VBIF` | NEON SIMD vector operation | +| `VBIT` | | +| `VBSL` | NEON SIMD vector operation | +| `VCMEQ` | | +| `VCMTST` | | +| `VCNT` | NEON SIMD vector operation | +| `VDUP` | NEON SIMD vector operation | +| `VEOR` | NEON SIMD vector operation | +| `VEOR3` | Three-way XOR / rotate crypto vector operation | +| `VEXT` | NEON SIMD vector operation | +| `VFMLA` | NEON SIMD vector operation | +| `VFMLS` | NEON SIMD vector operation | +| `VLD1` | NEON SIMD vector operation | +| `VLD1R` | | +| `VLD2` | NEON SIMD vector operation | +| `VLD2R` | | +| `VLD3` | NEON SIMD vector operation | +| `VLD3R` | | +| `VLD4` | NEON SIMD vector operation | +| `VLD4R` | | +| `VMOV` | NEON SIMD vector operation | +| `VMOVD` | | +| `VMOVI` | NEON SIMD vector operation | +| `VMOVQ` | NEON SIMD vector operation | +| `VMOVS` | | +| `VORR` | NEON SIMD vector operation | +| `VPMULL` | | +| `VPMULL2` | | +| `VRAX1` | Three-way XOR / rotate crypto vector operation | +| `VRBIT` | | +| `VREV16` | NEON SIMD vector operation | +| `VREV32` | NEON SIMD vector operation | +| `VREV64` | NEON SIMD vector operation | +| `VSHL` | NEON SIMD vector operation | +| `VSLI` | | +| `VSRI` | | +| `VST1` | NEON SIMD vector operation | +| `VST2` | NEON SIMD vector operation | +| `VST3` | NEON SIMD vector operation | +| `VST4` | NEON SIMD vector operation | +| `VSUB` | NEON SIMD vector operation | +| `VTBL` | NEON SIMD vector operation | +| `VTBX` | NEON SIMD vector operation | +| `VTRN1` | NEON SIMD vector operation | +| `VTRN2` | NEON SIMD vector operation | +| `VUADDLV` | | +| `VUADDW` | | +| `VUADDW2` | | +| `VUMAX` | | +| `VUMIN` | | +| `VUSHLL` | | +| `VUSHLL2` | | +| `VUSHR` | NEON SIMD vector operation | +| `VUSRA` | | +| `VUXTL` | | +| `VUXTL2` | | +| `VUZP1` | NEON SIMD vector operation | +| `VUZP2` | NEON SIMD vector operation | +| `VXAR` | Three-way XOR / rotate crypto vector operation | +| `VZIP1` | NEON SIMD vector operation | +| `VZIP2` | NEON SIMD vector operation | +| `WFE` | | +| `WFI` | | +| `WORD` | | +| `YIELD` | | +| `B` | Unconditional branch | +| `BL` | Branch with link | + +Recognised: 554 mnemonics. diff --git a/docs/asm/INSTRUCTIONS-LOONG64.md b/docs/asm/INSTRUCTIONS-LOONG64.md new file mode 100644 index 0000000..b953972 --- /dev/null +++ b/docs/asm/INSTRUCTIONS-LOONG64.md @@ -0,0 +1,830 @@ +# LoongArch 64: instruction inventory + +Generated by gasm-devkit's `_gen` from the Go toolchain's instruction table +(`cmd/internal/obj/loong64/anames.go`, go1.27.1); DO NOT EDIT. This page lists every mnemonic +`go tool asm` accepts on this target, which is the upper bound of the +language on it: a name absent here is not an instruction of the target, +and a name present here may still be one gasm's encoder cannot emit yet. + +The inventory carries no per-mnemonic encoder column: on this target +encodability is decided per operand shape, and the live measured +coverage is reported by `gasm audit-instructions`. + +| Mnemonic | Notes | +|---|---| +| `CALL` | | +| `DUFFCOPY` | | +| `DUFFZERO` | | +| `END` | | +| `FUNCDATA` | | +| `GETCALLERPC` | | +| `JMP` | | +| `NOP` | No operation | +| `PCALIGN` | | +| `PCALIGNMAX` | | +| `PCDATA` | | +| `RET` | Return | +| `TEXT` | | +| `UNDEF` | | +| `ABSD` | | +| `ABSF` | | +| `ADD` | Integer add (word) | +| `ADDD` | Add doubleword | +| `ADDF` | | +| `ADDV` | | +| `ADDV16` | | +| `ADDVU` | | +| `ADDW` | Add word | +| `ALSLV` | | +| `ALSLW` | | +| `ALSLWU` | | +| `AMADDDBV` | | +| `AMADDDBW` | | +| `AMADDV` | | +| `AMADDW` | | +| `AMANDDBV` | | +| `AMANDDBW` | | +| `AMANDV` | | +| `AMANDW` | | +| `AMCASB` | | +| `AMCASDBB` | | +| `AMCASDBH` | | +| `AMCASDBV` | | +| `AMCASDBW` | | +| `AMCASH` | | +| `AMCASV` | | +| `AMCASW` | | +| `AMMAXDBV` | | +| `AMMAXDBVU` | | +| `AMMAXDBW` | | +| `AMMAXDBWU` | | +| `AMMAXV` | | +| `AMMAXVU` | | +| `AMMAXW` | | +| `AMMAXWU` | | +| `AMMINDBV` | | +| `AMMINDBVU` | | +| `AMMINDBW` | | +| `AMMINDBWU` | | +| `AMMINV` | | +| `AMMINVU` | | +| `AMMINW` | | +| `AMMINWU` | | +| `AMORDBV` | | +| `AMORDBW` | | +| `AMORV` | | +| `AMORW` | | +| `AMSWAPB` | | +| `AMSWAPDBB` | | +| `AMSWAPDBH` | | +| `AMSWAPDBV` | | +| `AMSWAPDBW` | | +| `AMSWAPH` | | +| `AMSWAPV` | | +| `AMSWAPW` | | +| `AMXORDBV` | | +| `AMXORDBW` | | +| `AMXORV` | | +| `AMXORW` | | +| `AND` | Bitwise AND | +| `ANDN` | | +| `BEQ` | Branch if equal | +| `BFPF` | | +| `BFPT` | | +| `BGE` | Branch if greater or equal | +| `BGEU` | Branch if greater or equal unsigned | +| `BGEZ` | | +| `BGTZ` | | +| `BITREV4B` | | +| `BITREV8B` | | +| `BITREVV` | | +| `BITREVW` | | +| `BLEZ` | | +| `BLT` | Branch if less than | +| `BLTU` | Branch if less than unsigned | +| `BLTZ` | | +| `BNE` | Branch if not equal | +| `BREAK` | Breakpoint | +| `BSTRINSV` | | +| `BSTRINSW` | | +| `BSTRPICKV` | | +| `BSTRPICKW` | | +| `CLOV` | | +| `CLOW` | | +| `CLZV` | | +| `CLZW` | | +| `CMPEQD` | | +| `CMPEQF` | | +| `CMPGED` | | +| `CMPGEF` | | +| `CMPGTD` | | +| `CMPGTF` | | +| `CPUCFG` | | +| `CRCCWBW` | | +| `CRCCWHW` | | +| `CRCCWVW` | | +| `CRCCWWW` | | +| `CRCWBW` | | +| `CRCWHW` | | +| `CRCWVW` | | +| `CRCWWW` | | +| `CTOV` | | +| `CTOW` | | +| `CTZV` | | +| `CTZW` | | +| `DBAR` | Barrier | +| `DIV` | Divide (word) | +| `DIVD` | Divide doubleword | +| `DIVF` | | +| `DIVU` | | +| `DIVV` | | +| `DIVVU` | | +| `DIVW` | Divide word | +| `DIVWU` | | +| `EXTWB` | | +| `EXTWH` | | +| `FCLASSD` | | +| `FCLASSF` | | +| `FCOPYSGD` | | +| `FCOPYSGF` | | +| `FFINTDV` | | +| `FFINTDW` | | +| `FFINTFV` | | +| `FFINTFW` | | +| `FLOGBD` | | +| `FLOGBF` | | +| `FMADDD` | | +| `FMADDF` | | +| `FMAXAD` | | +| `FMAXAF` | | +| `FMAXD` | | +| `FMAXF` | | +| `FMINAD` | | +| `FMINAF` | | +| `FMIND` | | +| `FMINF` | | +| `FMSUBD` | | +| `FMSUBF` | | +| `FNMADDD` | | +| `FNMADDF` | | +| `FNMSUBD` | | +| `FNMSUBF` | | +| `FSCALEBD` | | +| `FSCALEBF` | | +| `FSEL` | | +| `FTINTRMVD` | | +| `FTINTRMVF` | | +| `FTINTRMWD` | | +| `FTINTRMWF` | | +| `FTINTRNEVD` | | +| `FTINTRNEVF` | | +| `FTINTRNEWD` | | +| `FTINTRNEWF` | | +| `FTINTRPVD` | | +| `FTINTRPVF` | | +| `FTINTRPWD` | | +| `FTINTRPWF` | | +| `FTINTRZVD` | | +| `FTINTRZVF` | | +| `FTINTRZWD` | | +| `FTINTRZWF` | | +| `FTINTVD` | | +| `FTINTVF` | | +| `FTINTWD` | | +| `FTINTWF` | | +| `JIRL` | Jump indirect with link | +| `LL` | | +| `LLV` | | +| `LU12IW` | | +| `LU32ID` | | +| `LU52ID` | | +| `LUI` | | +| `MASKEQZ` | | +| `MASKNEZ` | | +| `MOVB` | | +| `MOVBU` | | +| `MOVD` | | +| `MOVDF` | | +| `MOVDV` | | +| `MOVDW` | | +| `MOVF` | | +| `MOVFD` | | +| `MOVFV` | | +| `MOVFW` | | +| `MOVH` | | +| `MOVHU` | | +| `MOVV` | | +| `MOVVD` | | +| `MOVVF` | | +| `MOVVP` | | +| `MOVW` | | +| `MOVWD` | | +| `MOVWF` | | +| `MOVWP` | | +| `MOVWU` | | +| `MUL` | Multiply (word) | +| `MULD` | Multiply doubleword | +| `MULF` | | +| `MULH` | | +| `MULHU` | | +| `MULHV` | | +| `MULHVU` | | +| `MULV` | | +| `MULVU` | | +| `MULW` | Multiply word | +| `MULWVW` | | +| `MULWVWU` | | +| `NEGD` | | +| `NEGF` | | +| `NEGV` | | +| `NEGW` | | +| `NOOP` | | +| `NOR` | Bitwise NOR | +| `OR` | Bitwise OR | +| `ORN` | | +| `PCADDU12I` | | +| `PCALAU12I` | | +| `PRELD` | | +| `PRELDX` | | +| `RDTIMED` | | +| `RDTIMEHW` | | +| `RDTIMELW` | | +| `REM` | | +| `REMU` | | +| `REMV` | | +| `REMVU` | | +| `REMW` | | +| `REMWU` | | +| `REVB2H` | | +| `REVB2W` | | +| `REVB4H` | | +| `REVBV` | | +| `REVH2W` | | +| `REVHV` | | +| `RFE` | | +| `ROTR` | Rotate right | +| `ROTRV` | | +| `SC` | | +| `SCV` | | +| `SGT` | | +| `SGTU` | | +| `SLL` | Shift left logical | +| `SLLV` | | +| `SQRTD` | | +| `SQRTF` | | +| `SRA` | Shift right arithmetic | +| `SRAV` | | +| `SRL` | Shift right logical | +| `SRLV` | | +| `SUB` | Subtract (word) | +| `SUBD` | Subtract doubleword | +| `SUBF` | | +| `SUBV` | | +| `SUBVU` | | +| `SUBW` | Subtract word | +| `SYSCALL` | System call | +| `TEQ` | | +| `TNE` | | +| `TRUNCDV` | | +| `TRUNCDW` | | +| `TRUNCFV` | | +| `TRUNCFW` | | +| `VADDB` | | +| `VADDBU` | | +| `VADDD` | | +| `VADDF` | | +| `VADDH` | | +| `VADDHU` | | +| `VADDQ` | | +| `VADDV` | | +| `VADDVU` | | +| `VADDW` | | +| `VADDWEVHB` | | +| `VADDWEVHBU` | | +| `VADDWEVQV` | | +| `VADDWEVQVU` | | +| `VADDWEVVW` | | +| `VADDWEVVWU` | | +| `VADDWEVWH` | | +| `VADDWEVWHU` | | +| `VADDWODHB` | | +| `VADDWODHBU` | | +| `VADDWODQV` | | +| `VADDWODQVU` | | +| `VADDWODVW` | | +| `VADDWODVWU` | | +| `VADDWODWH` | | +| `VADDWODWHU` | | +| `VADDWU` | | +| `VANDB` | | +| `VANDNV` | | +| `VANDV` | | +| `VBITCLRB` | | +| `VBITCLRH` | | +| `VBITCLRV` | | +| `VBITCLRW` | | +| `VBITREVB` | | +| `VBITREVH` | | +| `VBITREVV` | | +| `VBITREVW` | | +| `VBITSETB` | | +| `VBITSETH` | | +| `VBITSETV` | | +| `VBITSETW` | | +| `VDIVB` | | +| `VDIVBU` | | +| `VDIVD` | | +| `VDIVF` | | +| `VDIVH` | | +| `VDIVHU` | | +| `VDIVV` | | +| `VDIVVU` | | +| `VDIVW` | | +| `VDIVWU` | | +| `VEXTRINSB` | | +| `VEXTRINSH` | | +| `VEXTRINSV` | | +| `VEXTRINSW` | | +| `VFCLASSD` | | +| `VFCLASSF` | | +| `VFRECIPD` | | +| `VFRECIPF` | | +| `VFRINTD` | | +| `VFRINTF` | | +| `VFRINTRMD` | | +| `VFRINTRMF` | | +| `VFRINTRNED` | | +| `VFRINTRNEF` | | +| `VFRINTRPD` | | +| `VFRINTRPF` | | +| `VFRINTRZD` | | +| `VFRINTRZF` | | +| `VFRSQRTD` | | +| `VFRSQRTF` | | +| `VFSQRTD` | | +| `VFSQRTF` | | +| `VILVHB` | | +| `VILVHH` | | +| `VILVHV` | | +| `VILVHW` | | +| `VILVLB` | | +| `VILVLH` | | +| `VILVLV` | | +| `VILVLW` | | +| `VMADDB` | | +| `VMADDH` | | +| `VMADDV` | | +| `VMADDW` | | +| `VMADDWEVHB` | | +| `VMADDWEVHBU` | | +| `VMADDWEVHBUB` | | +| `VMADDWEVQV` | | +| `VMADDWEVQVU` | | +| `VMADDWEVQVUV` | | +| `VMADDWEVVW` | | +| `VMADDWEVVWU` | | +| `VMADDWEVVWUW` | | +| `VMADDWEVWH` | | +| `VMADDWEVWHU` | | +| `VMADDWEVWHUH` | | +| `VMADDWODHB` | | +| `VMADDWODHBU` | | +| `VMADDWODHBUB` | | +| `VMADDWODQV` | | +| `VMADDWODQVU` | | +| `VMADDWODQVUV` | | +| `VMADDWODVW` | | +| `VMADDWODVWU` | | +| `VMADDWODVWUW` | | +| `VMADDWODWH` | | +| `VMADDWODWHU` | | +| `VMADDWODWHUH` | | +| `VMODB` | | +| `VMODBU` | | +| `VMODH` | | +| `VMODHU` | | +| `VMODV` | | +| `VMODVU` | | +| `VMODW` | | +| `VMODWU` | | +| `VMOVQ` | | +| `VMSUBB` | | +| `VMSUBH` | | +| `VMSUBV` | | +| `VMSUBW` | | +| `VMUHB` | | +| `VMUHBU` | | +| `VMUHH` | | +| `VMUHHU` | | +| `VMUHV` | | +| `VMUHVU` | | +| `VMUHW` | | +| `VMUHWU` | | +| `VMULB` | | +| `VMULD` | | +| `VMULF` | | +| `VMULH` | | +| `VMULV` | | +| `VMULW` | | +| `VMULWEVHB` | | +| `VMULWEVHBU` | | +| `VMULWEVHBUB` | | +| `VMULWEVQV` | | +| `VMULWEVQVU` | | +| `VMULWEVQVUV` | | +| `VMULWEVVW` | | +| `VMULWEVVWU` | | +| `VMULWEVVWUW` | | +| `VMULWEVWH` | | +| `VMULWEVWHU` | | +| `VMULWEVWHUH` | | +| `VMULWODHB` | | +| `VMULWODHBU` | | +| `VMULWODHBUB` | | +| `VMULWODQV` | | +| `VMULWODQVU` | | +| `VMULWODQVUV` | | +| `VMULWODVW` | | +| `VMULWODVWU` | | +| `VMULWODVWUW` | | +| `VMULWODWH` | | +| `VMULWODWHU` | | +| `VMULWODWHUH` | | +| `VNEGB` | | +| `VNEGH` | | +| `VNEGV` | | +| `VNEGW` | | +| `VNORB` | | +| `VNORV` | | +| `VORB` | | +| `VORNV` | | +| `VORV` | | +| `VPCNTB` | | +| `VPCNTH` | | +| `VPCNTV` | | +| `VPCNTW` | | +| `VPERMIW` | | +| `VROTRB` | | +| `VROTRH` | | +| `VROTRV` | | +| `VROTRW` | | +| `VSADDB` | | +| `VSADDBU` | | +| `VSADDH` | | +| `VSADDHU` | | +| `VSADDV` | | +| `VSADDVU` | | +| `VSADDW` | | +| `VSADDWU` | | +| `VSEQB` | | +| `VSEQH` | | +| `VSEQV` | | +| `VSEQW` | | +| `VSETALLNEB` | | +| `VSETALLNEH` | | +| `VSETALLNEV` | | +| `VSETALLNEW` | | +| `VSETANYEQB` | | +| `VSETANYEQH` | | +| `VSETANYEQV` | | +| `VSETANYEQW` | | +| `VSETEQV` | | +| `VSETNEV` | | +| `VSHUF4IB` | | +| `VSHUF4IH` | | +| `VSHUF4IV` | | +| `VSHUF4IW` | | +| `VSHUFB` | | +| `VSHUFH` | | +| `VSHUFV` | | +| `VSHUFW` | | +| `VSLLB` | | +| `VSLLH` | | +| `VSLLV` | | +| `VSLLW` | | +| `VSLTB` | | +| `VSLTBU` | | +| `VSLTH` | | +| `VSLTHU` | | +| `VSLTV` | | +| `VSLTVU` | | +| `VSLTW` | | +| `VSLTWU` | | +| `VSRAB` | | +| `VSRAH` | | +| `VSRAV` | | +| `VSRAW` | | +| `VSRLB` | | +| `VSRLH` | | +| `VSRLV` | | +| `VSRLW` | | +| `VSSUBB` | | +| `VSSUBBU` | | +| `VSSUBH` | | +| `VSSUBHU` | | +| `VSSUBV` | | +| `VSSUBVU` | | +| `VSSUBW` | | +| `VSSUBWU` | | +| `VSUBB` | | +| `VSUBBU` | | +| `VSUBD` | | +| `VSUBF` | | +| `VSUBH` | | +| `VSUBHU` | | +| `VSUBQ` | | +| `VSUBV` | | +| `VSUBVU` | | +| `VSUBW` | | +| `VSUBWEVHB` | | +| `VSUBWEVHBU` | | +| `VSUBWEVQV` | | +| `VSUBWEVQVU` | | +| `VSUBWEVVW` | | +| `VSUBWEVVWU` | | +| `VSUBWEVWH` | | +| `VSUBWEVWHU` | | +| `VSUBWODHB` | | +| `VSUBWODHBU` | | +| `VSUBWODQV` | | +| `VSUBWODQVU` | | +| `VSUBWODVW` | | +| `VSUBWODVWU` | | +| `VSUBWODWH` | | +| `VSUBWODWHU` | | +| `VSUBWU` | | +| `VXORB` | | +| `VXORV` | | +| `WORD` | | +| `XOR` | Bitwise XOR | +| `XVADDB` | | +| `XVADDBU` | | +| `XVADDD` | | +| `XVADDF` | | +| `XVADDH` | | +| `XVADDHU` | | +| `XVADDQ` | | +| `XVADDV` | | +| `XVADDVU` | | +| `XVADDW` | | +| `XVADDWEVHB` | | +| `XVADDWEVHBU` | | +| `XVADDWEVQV` | | +| `XVADDWEVQVU` | | +| `XVADDWEVVW` | | +| `XVADDWEVVWU` | | +| `XVADDWEVWH` | | +| `XVADDWEVWHU` | | +| `XVADDWODHB` | | +| `XVADDWODHBU` | | +| `XVADDWODQV` | | +| `XVADDWODQVU` | | +| `XVADDWODVW` | | +| `XVADDWODVWU` | | +| `XVADDWODWH` | | +| `XVADDWODWHU` | | +| `XVADDWU` | | +| `XVANDB` | | +| `XVANDNV` | | +| `XVANDV` | | +| `XVBITCLRB` | | +| `XVBITCLRH` | | +| `XVBITCLRV` | | +| `XVBITCLRW` | | +| `XVBITREVB` | | +| `XVBITREVH` | | +| `XVBITREVV` | | +| `XVBITREVW` | | +| `XVBITSETB` | | +| `XVBITSETH` | | +| `XVBITSETV` | | +| `XVBITSETW` | | +| `XVDIVB` | | +| `XVDIVBU` | | +| `XVDIVD` | | +| `XVDIVF` | | +| `XVDIVH` | | +| `XVDIVHU` | | +| `XVDIVV` | | +| `XVDIVVU` | | +| `XVDIVW` | | +| `XVDIVWU` | | +| `XVEXTRINSB` | | +| `XVEXTRINSH` | | +| `XVEXTRINSV` | | +| `XVEXTRINSW` | | +| `XVFCLASSD` | | +| `XVFCLASSF` | | +| `XVFRECIPD` | | +| `XVFRECIPF` | | +| `XVFRINTD` | | +| `XVFRINTF` | | +| `XVFRINTRMD` | | +| `XVFRINTRMF` | | +| `XVFRINTRNED` | | +| `XVFRINTRNEF` | | +| `XVFRINTRPD` | | +| `XVFRINTRPF` | | +| `XVFRINTRZD` | | +| `XVFRINTRZF` | | +| `XVFRSQRTD` | | +| `XVFRSQRTF` | | +| `XVFSQRTD` | | +| `XVFSQRTF` | | +| `XVILVHB` | | +| `XVILVHH` | | +| `XVILVHV` | | +| `XVILVHW` | | +| `XVILVLB` | | +| `XVILVLH` | | +| `XVILVLV` | | +| `XVILVLW` | | +| `XVMADDB` | | +| `XVMADDH` | | +| `XVMADDV` | | +| `XVMADDW` | | +| `XVMADDWEVHB` | | +| `XVMADDWEVHBU` | | +| `XVMADDWEVHBUB` | | +| `XVMADDWEVQV` | | +| `XVMADDWEVQVU` | | +| `XVMADDWEVQVUV` | | +| `XVMADDWEVVW` | | +| `XVMADDWEVVWU` | | +| `XVMADDWEVVWUW` | | +| `XVMADDWEVWH` | | +| `XVMADDWEVWHU` | | +| `XVMADDWEVWHUH` | | +| `XVMADDWODHB` | | +| `XVMADDWODHBU` | | +| `XVMADDWODHBUB` | | +| `XVMADDWODQV` | | +| `XVMADDWODQVU` | | +| `XVMADDWODQVUV` | | +| `XVMADDWODVW` | | +| `XVMADDWODVWU` | | +| `XVMADDWODVWUW` | | +| `XVMADDWODWH` | | +| `XVMADDWODWHU` | | +| `XVMADDWODWHUH` | | +| `XVMODB` | | +| `XVMODBU` | | +| `XVMODH` | | +| `XVMODHU` | | +| `XVMODV` | | +| `XVMODVU` | | +| `XVMODW` | | +| `XVMODWU` | | +| `XVMOVQ` | | +| `XVMSUBB` | | +| `XVMSUBH` | | +| `XVMSUBV` | | +| `XVMSUBW` | | +| `XVMUHB` | | +| `XVMUHBU` | | +| `XVMUHH` | | +| `XVMUHHU` | | +| `XVMUHV` | | +| `XVMUHVU` | | +| `XVMUHW` | | +| `XVMUHWU` | | +| `XVMULB` | | +| `XVMULD` | | +| `XVMULF` | | +| `XVMULH` | | +| `XVMULV` | | +| `XVMULW` | | +| `XVMULWEVHB` | | +| `XVMULWEVHBU` | | +| `XVMULWEVHBUB` | | +| `XVMULWEVQV` | | +| `XVMULWEVQVU` | | +| `XVMULWEVQVUV` | | +| `XVMULWEVVW` | | +| `XVMULWEVVWU` | | +| `XVMULWEVVWUW` | | +| `XVMULWEVWH` | | +| `XVMULWEVWHU` | | +| `XVMULWEVWHUH` | | +| `XVMULWODHB` | | +| `XVMULWODHBU` | | +| `XVMULWODHBUB` | | +| `XVMULWODQV` | | +| `XVMULWODQVU` | | +| `XVMULWODQVUV` | | +| `XVMULWODVW` | | +| `XVMULWODVWU` | | +| `XVMULWODVWUW` | | +| `XVMULWODWH` | | +| `XVMULWODWHU` | | +| `XVMULWODWHUH` | | +| `XVNEGB` | | +| `XVNEGH` | | +| `XVNEGV` | | +| `XVNEGW` | | +| `XVNORB` | | +| `XVNORV` | | +| `XVORB` | | +| `XVORNV` | | +| `XVORV` | | +| `XVPCNTB` | | +| `XVPCNTH` | | +| `XVPCNTV` | | +| `XVPCNTW` | | +| `XVPERMIQ` | | +| `XVPERMIV` | | +| `XVPERMIW` | | +| `XVROTRB` | | +| `XVROTRH` | | +| `XVROTRV` | | +| `XVROTRW` | | +| `XVSADDB` | | +| `XVSADDBU` | | +| `XVSADDH` | | +| `XVSADDHU` | | +| `XVSADDV` | | +| `XVSADDVU` | | +| `XVSADDW` | | +| `XVSADDWU` | | +| `XVSEQB` | | +| `XVSEQH` | | +| `XVSEQV` | | +| `XVSEQW` | | +| `XVSETALLNEB` | | +| `XVSETALLNEH` | | +| `XVSETALLNEV` | | +| `XVSETALLNEW` | | +| `XVSETANYEQB` | | +| `XVSETANYEQH` | | +| `XVSETANYEQV` | | +| `XVSETANYEQW` | | +| `XVSETEQV` | | +| `XVSETNEV` | | +| `XVSHUF4IB` | | +| `XVSHUF4IH` | | +| `XVSHUF4IV` | | +| `XVSHUF4IW` | | +| `XVSHUFB` | | +| `XVSHUFH` | | +| `XVSHUFV` | | +| `XVSHUFW` | | +| `XVSLLB` | | +| `XVSLLH` | | +| `XVSLLV` | | +| `XVSLLW` | | +| `XVSLTB` | | +| `XVSLTBU` | | +| `XVSLTH` | | +| `XVSLTHU` | | +| `XVSLTV` | | +| `XVSLTVU` | | +| `XVSLTW` | | +| `XVSLTWU` | | +| `XVSRAB` | | +| `XVSRAH` | | +| `XVSRAV` | | +| `XVSRAW` | | +| `XVSRLB` | | +| `XVSRLH` | | +| `XVSRLV` | | +| `XVSRLW` | | +| `XVSSUBB` | | +| `XVSSUBBU` | | +| `XVSSUBH` | | +| `XVSSUBHU` | | +| `XVSSUBV` | | +| `XVSSUBVU` | | +| `XVSSUBW` | | +| `XVSSUBWU` | | +| `XVSUBB` | | +| `XVSUBBU` | | +| `XVSUBD` | | +| `XVSUBF` | | +| `XVSUBH` | | +| `XVSUBHU` | | +| `XVSUBQ` | | +| `XVSUBV` | | +| `XVSUBVU` | | +| `XVSUBW` | | +| `XVSUBWEVHB` | | +| `XVSUBWEVHBU` | | +| `XVSUBWEVQV` | | +| `XVSUBWEVQVU` | | +| `XVSUBWEVVW` | | +| `XVSUBWEVVWU` | | +| `XVSUBWEVWH` | | +| `XVSUBWEVWHU` | | +| `XVSUBWODHB` | | +| `XVSUBWODHBU` | | +| `XVSUBWODQV` | | +| `XVSUBWODQVU` | | +| `XVSUBWODVW` | | +| `XVSUBWODVWU` | | +| `XVSUBWODWH` | | +| `XVSUBWODWHU` | | +| `XVSUBWU` | | +| `XVXORB` | | +| `XVXORV` | | +| `JAL` | | + +Recognised: 814 mnemonics. diff --git a/docs/asm/INSTRUCTIONS-RISCV64.md b/docs/asm/INSTRUCTIONS-RISCV64.md new file mode 100644 index 0000000..b82e34d --- /dev/null +++ b/docs/asm/INSTRUCTIONS-RISCV64.md @@ -0,0 +1,991 @@ +# RISC-V 64: instruction inventory + +Generated by gasm-devkit's `_gen` from the Go toolchain's instruction table +(`cmd/internal/obj/riscv/anames.go`, go1.27.1); DO NOT EDIT. This page lists every mnemonic +`go tool asm` accepts on this target, which is the upper bound of the +language on it: a name absent here is not an instruction of the target, +and a name present here may still be one gasm's encoder cannot emit yet. + +The inventory carries no per-mnemonic encoder column: on this target +encodability is decided per operand shape, and the live measured +coverage is reported by `gasm audit-instructions`. + +| Mnemonic | Notes | +|---|---| +| `CALL` | Call subroutine | +| `DUFFCOPY` | | +| `DUFFZERO` | | +| `END` | | +| `FUNCDATA` | | +| `GETCALLERPC` | | +| `JMP` | Unconditional jump | +| `NOP` | | +| `PCALIGN` | | +| `PCALIGNMAX` | | +| `PCDATA` | | +| `RET` | Return | +| `TEXT` | | +| `UNDEF` | | +| `ADD` | Integer add | +| `ADDI` | Add immediate | +| `ADDIW` | Add immediate (32-bit) | +| `ADDUW` | | +| `ADDW` | Add (32-bit) | +| `AMOADDD` | Atomic add doubleword | +| `AMOADDW` | Atomic add word | +| `AMOANDD` | | +| `AMOANDW` | | +| `AMOMAXD` | | +| `AMOMAXUD` | | +| `AMOMAXUW` | | +| `AMOMAXW` | | +| `AMOMIND` | | +| `AMOMINUD` | | +| `AMOMINUW` | | +| `AMOMINW` | | +| `AMOORD` | | +| `AMOORW` | | +| `AMOSWAPD` | Atomic swap doubleword | +| `AMOSWAPW` | Atomic swap word | +| `AMOXORD` | | +| `AMOXORW` | | +| `AND` | Bitwise AND | +| `ANDI` | AND immediate | +| `ANDN` | | +| `AUIPC` | Add upper immediate to PC | +| `BCLR` | | +| `BCLRI` | | +| `BEQ` | Branch if equal | +| `BEQZ` | | +| `BEXT` | | +| `BEXTI` | | +| `BGE` | Branch if greater or equal | +| `BGEU` | Branch if greater or equal unsigned | +| `BGEZ` | | +| `BGT` | | +| `BGTU` | | +| `BGTZ` | | +| `BINV` | | +| `BINVI` | | +| `BLE` | | +| `BLEU` | | +| `BLEZ` | | +| `BLT` | Branch if less than | +| `BLTU` | Branch if less than unsigned | +| `BLTZ` | | +| `BNE` | Branch if not equal | +| `BNEZ` | | +| `BSET` | | +| `BSETI` | | +| `CADD` | | +| `CADDI` | | +| `CADDI16SP` | | +| `CADDI4SPN` | | +| `CADDIW` | | +| `CADDW` | | +| `CAND` | | +| `CANDI` | | +| `CBEQZ` | | +| `CBNEZ` | | +| `CEBREAK` | | +| `CFLD` | | +| `CFLDSP` | | +| `CFSD` | | +| `CFSDSP` | | +| `CJ` | | +| `CJALR` | | +| `CJR` | | +| `CLD` | | +| `CLDSP` | | +| `CLI` | | +| `CLUI` | | +| `CLW` | | +| `CLWSP` | | +| `CLZ` | | +| `CLZW` | | +| `CMV` | | +| `CNOP` | | +| `COR` | | +| `CPOP` | | +| `CPOPW` | | +| `CSD` | | +| `CSDSP` | | +| `CSLLI` | | +| `CSRAI` | | +| `CSRLI` | | +| `CSRRC` | | +| `CSRRCI` | | +| `CSRRS` | | +| `CSRRSI` | | +| `CSRRW` | | +| `CSRRWI` | | +| `CSUB` | | +| `CSUBW` | | +| `CSW` | | +| `CSWSP` | | +| `CTZ` | | +| `CTZW` | | +| `CXOR` | | +| `CZEROEQZ` | | +| `CZERONEZ` | | +| `DIV` | Divide | +| `DIVU` | Divide unsigned | +| `DIVUW` | | +| `DIVW` | Divide (32-bit) | +| `DRET` | | +| `EBREAK` | Breakpoint | +| `ECALL` | Environment call | +| `FABSD` | | +| `FABSS` | | +| `FADDD` | FP add (double) | +| `FADDQ` | | +| `FADDS` | FP add (single) | +| `FCLASSD` | | +| `FCLASSQ` | | +| `FCLASSS` | | +| `FCVTDL` | | +| `FCVTDLU` | | +| `FCVTDQ` | | +| `FCVTDS` | | +| `FCVTDW` | | +| `FCVTDWU` | | +| `FCVTLD` | | +| `FCVTLQ` | | +| `FCVTLS` | | +| `FCVTLUD` | | +| `FCVTLUQ` | | +| `FCVTLUS` | | +| `FCVTQD` | | +| `FCVTQL` | | +| `FCVTQLU` | | +| `FCVTQS` | | +| `FCVTQW` | | +| `FCVTQWU` | | +| `FCVTSD` | | +| `FCVTSL` | | +| `FCVTSLU` | | +| `FCVTSQ` | | +| `FCVTSW` | | +| `FCVTSWU` | | +| `FCVTWD` | | +| `FCVTWQ` | | +| `FCVTWS` | | +| `FCVTWUD` | | +| `FCVTWUQ` | | +| `FCVTWUS` | | +| `FDIVD` | FP divide (double) | +| `FDIVQ` | | +| `FDIVS` | FP divide (single) | +| `FENCE` | Memory barrier | +| `FEQD` | | +| `FEQQ` | | +| `FEQS` | | +| `FLD` | FP load doubleword | +| `FLED` | | +| `FLEQ` | | +| `FLES` | | +| `FLQ` | | +| `FLTD` | | +| `FLTQ` | | +| `FLTS` | | +| `FLW` | FP load word | +| `FMADDD` | | +| `FMADDQ` | | +| `FMADDS` | | +| `FMAXD` | | +| `FMAXQ` | | +| `FMAXS` | | +| `FMIND` | | +| `FMINQ` | | +| `FMINS` | | +| `FMSUBD` | | +| `FMSUBQ` | | +| `FMSUBS` | | +| `FMULD` | FP multiply (double) | +| `FMULQ` | | +| `FMULS` | FP multiply (single) | +| `FMVDX` | | +| `FMVSX` | | +| `FMVWX` | | +| `FMVXD` | | +| `FMVXS` | | +| `FMVXW` | | +| `FNED` | | +| `FNEGD` | | +| `FNEGS` | | +| `FNES` | | +| `FNMADDD` | | +| `FNMADDQ` | | +| `FNMADDS` | | +| `FNMSUBD` | | +| `FNMSUBQ` | | +| `FNMSUBS` | | +| `FSD` | FP store doubleword | +| `FSGNJD` | | +| `FSGNJND` | | +| `FSGNJNQ` | | +| `FSGNJNS` | | +| `FSGNJQ` | | +| `FSGNJS` | | +| `FSGNJXD` | | +| `FSGNJXQ` | | +| `FSGNJXS` | | +| `FSQ` | | +| `FSQRTD` | | +| `FSQRTQ` | | +| `FSQRTS` | | +| `FSUBD` | FP subtract (double) | +| `FSUBQ` | | +| `FSUBS` | FP subtract (single) | +| `FSW` | FP store word | +| `JAL` | Jump and link | +| `JALR` | Jump and link register | +| `LB` | Load byte | +| `LBU` | Load byte unsigned | +| `LD` | Load doubleword | +| `LH` | Load halfword | +| `LHU` | Load halfword unsigned | +| `LRD` | Load-reserved doubleword | +| `LRW` | Load-reserved word | +| `LUI` | Load upper immediate | +| `LW` | Load word | +| `LWU` | Load word unsigned | +| `MAX` | | +| `MAXU` | | +| `MIN` | | +| `MINU` | | +| `MOV` | | +| `MOVB` | | +| `MOVBU` | | +| `MOVD` | | +| `MOVF` | | +| `MOVH` | | +| `MOVHU` | | +| `MOVW` | | +| `MOVWU` | | +| `MRET` | | +| `MUL` | Multiply | +| `MULH` | Multiply high | +| `MULHSU` | Multiply high signed/unsigned | +| `MULHU` | Multiply high unsigned | +| `MULW` | Multiply (32-bit) | +| `NEG` | | +| `NEGW` | | +| `NOT` | | +| `OR` | Bitwise OR | +| `ORCB` | | +| `ORI` | OR immediate | +| `ORN` | | +| `RDCYCLE` | | +| `RDINSTRET` | | +| `RDTIME` | | +| `REM` | Remainder | +| `REMU` | Remainder unsigned | +| `REMUW` | | +| `REMW` | | +| `REV8` | | +| `ROL` | | +| `ROLW` | | +| `ROR` | | +| `RORI` | | +| `RORIW` | | +| `RORW` | | +| `SB` | Store byte | +| `SBREAK` | | +| `SCALL` | | +| `SCD` | Store-conditional doubleword | +| `SCW` | Store-conditional word | +| `SD` | Store doubleword | +| `SEQZ` | | +| `SEXTB` | | +| `SEXTH` | | +| `SFENCEVMA` | | +| `SH` | Store halfword | +| `SH1ADD` | | +| `SH1ADDUW` | | +| `SH2ADD` | | +| `SH2ADDUW` | | +| `SH3ADD` | | +| `SH3ADDUW` | | +| `SLL` | Shift left logical | +| `SLLI` | Shift left logical immediate | +| `SLLIUW` | | +| `SLLIW` | | +| `SLLW` | | +| `SLT` | Set if less than | +| `SLTI` | Set if less than immediate | +| `SLTIU` | Set if less than unsigned immediate | +| `SLTU` | Set if less than unsigned | +| `SNEZ` | | +| `SRA` | Shift right arithmetic | +| `SRAI` | Shift right arithmetic immediate | +| `SRAIW` | | +| `SRAW` | | +| `SRET` | | +| `SRL` | Shift right logical | +| `SRLI` | Shift right logical immediate | +| `SRLIW` | | +| `SRLW` | | +| `SUB` | Integer subtract | +| `SUBW` | Subtract (32-bit) | +| `SW` | Store word | +| `VAADDUVV` | | +| `VAADDUVX` | | +| `VAADDVV` | | +| `VAADDVX` | | +| `VADCVIM` | | +| `VADCVVM` | | +| `VADCVXM` | | +| `VADDVI` | | +| `VADDVV` | | +| `VADDVX` | | +| `VANDVI` | | +| `VANDVV` | | +| `VANDVX` | | +| `VASUBUVV` | | +| `VASUBUVX` | | +| `VASUBVV` | | +| `VASUBVX` | | +| `VCOMPRESSVM` | | +| `VCPOPM` | | +| `VDIVUVV` | | +| `VDIVUVX` | | +| `VDIVVV` | | +| `VDIVVX` | | +| `VFABSV` | | +| `VFADDVF` | | +| `VFADDVV` | | +| `VFCLASSV` | | +| `VFCVTFXUV` | | +| `VFCVTFXV` | | +| `VFCVTRTZXFV` | | +| `VFCVTRTZXUFV` | | +| `VFCVTXFV` | | +| `VFCVTXUFV` | | +| `VFDIVVF` | | +| `VFDIVVV` | | +| `VFIRSTM` | | +| `VFMACCVF` | | +| `VFMACCVV` | | +| `VFMADDVF` | | +| `VFMADDVV` | | +| `VFMAXVF` | | +| `VFMAXVV` | | +| `VFMERGEVFM` | | +| `VFMINVF` | | +| `VFMINVV` | | +| `VFMSACVF` | | +| `VFMSACVV` | | +| `VFMSUBVF` | | +| `VFMSUBVV` | | +| `VFMULVF` | | +| `VFMULVV` | | +| `VFMVFS` | | +| `VFMVSF` | | +| `VFMVVF` | | +| `VFNCVTFFW` | | +| `VFNCVTFXUW` | | +| `VFNCVTFXW` | | +| `VFNCVTRODFFW` | | +| `VFNCVTRTZXFW` | | +| `VFNCVTRTZXUFW` | | +| `VFNCVTXFW` | | +| `VFNCVTXUFW` | | +| `VFNEGV` | | +| `VFNMACCVF` | | +| `VFNMACCVV` | | +| `VFNMADDVF` | | +| `VFNMADDVV` | | +| `VFNMSACVF` | | +| `VFNMSACVV` | | +| `VFNMSUBVF` | | +| `VFNMSUBVV` | | +| `VFRDIVVF` | | +| `VFREC7V` | | +| `VFREDMAXVS` | | +| `VFREDMINVS` | | +| `VFREDOSUMVS` | | +| `VFREDUSUMVS` | | +| `VFRSQRT7V` | | +| `VFRSUBVF` | | +| `VFSGNJNVF` | | +| `VFSGNJNVV` | | +| `VFSGNJVF` | | +| `VFSGNJVV` | | +| `VFSGNJXVF` | | +| `VFSGNJXVV` | | +| `VFSLIDE1DOWNVF` | | +| `VFSLIDE1UPVF` | | +| `VFSQRTV` | | +| `VFSUBVF` | | +| `VFSUBVV` | | +| `VFWADDVF` | | +| `VFWADDVV` | | +| `VFWADDWF` | | +| `VFWADDWV` | | +| `VFWCVTFFV` | | +| `VFWCVTFXUV` | | +| `VFWCVTFXV` | | +| `VFWCVTRTZXFV` | | +| `VFWCVTRTZXUFV` | | +| `VFWCVTXFV` | | +| `VFWCVTXUFV` | | +| `VFWMACCVF` | | +| `VFWMACCVV` | | +| `VFWMSACVF` | | +| `VFWMSACVV` | | +| `VFWMULVF` | | +| `VFWMULVV` | | +| `VFWNMACCVF` | | +| `VFWNMACCVV` | | +| `VFWNMSACVF` | | +| `VFWNMSACVV` | | +| `VFWREDOSUMVS` | | +| `VFWREDUSUMVS` | | +| `VFWSUBVF` | | +| `VFWSUBVV` | | +| `VFWSUBWF` | | +| `VFWSUBWV` | | +| `VIDV` | | +| `VIOTAM` | | +| `VL1RE16V` | | +| `VL1RE32V` | | +| `VL1RE64V` | | +| `VL1RE8V` | | +| `VL1RV` | | +| `VL2RE16V` | | +| `VL2RE32V` | | +| `VL2RE64V` | | +| `VL2RE8V` | | +| `VL2RV` | | +| `VL4RE16V` | | +| `VL4RE32V` | | +| `VL4RE64V` | | +| `VL4RE8V` | | +| `VL4RV` | | +| `VL8RE16V` | | +| `VL8RE32V` | | +| `VL8RE64V` | | +| `VL8RE8V` | | +| `VL8RV` | | +| `VLE16FFV` | | +| `VLE16V` | | +| `VLE32FFV` | | +| `VLE32V` | | +| `VLE64FFV` | | +| `VLE64V` | | +| `VLE8FFV` | | +| `VLE8V` | | +| `VLMV` | | +| `VLOXEI16V` | | +| `VLOXEI32V` | | +| `VLOXEI64V` | | +| `VLOXEI8V` | | +| `VLOXSEG2EI16V` | | +| `VLOXSEG2EI32V` | | +| `VLOXSEG2EI64V` | | +| `VLOXSEG2EI8V` | | +| `VLOXSEG3EI16V` | | +| `VLOXSEG3EI32V` | | +| `VLOXSEG3EI64V` | | +| `VLOXSEG3EI8V` | | +| `VLOXSEG4EI16V` | | +| `VLOXSEG4EI32V` | | +| `VLOXSEG4EI64V` | | +| `VLOXSEG4EI8V` | | +| `VLOXSEG5EI16V` | | +| `VLOXSEG5EI32V` | | +| `VLOXSEG5EI64V` | | +| `VLOXSEG5EI8V` | | +| `VLOXSEG6EI16V` | | +| `VLOXSEG6EI32V` | | +| `VLOXSEG6EI64V` | | +| `VLOXSEG6EI8V` | | +| `VLOXSEG7EI16V` | | +| `VLOXSEG7EI32V` | | +| `VLOXSEG7EI64V` | | +| `VLOXSEG7EI8V` | | +| `VLOXSEG8EI16V` | | +| `VLOXSEG8EI32V` | | +| `VLOXSEG8EI64V` | | +| `VLOXSEG8EI8V` | | +| `VLSE16V` | | +| `VLSE32V` | | +| `VLSE64V` | | +| `VLSE8V` | | +| `VLSEG2E16FFV` | | +| `VLSEG2E16V` | | +| `VLSEG2E32FFV` | | +| `VLSEG2E32V` | | +| `VLSEG2E64FFV` | | +| `VLSEG2E64V` | | +| `VLSEG2E8FFV` | | +| `VLSEG2E8V` | | +| `VLSEG3E16FFV` | | +| `VLSEG3E16V` | | +| `VLSEG3E32FFV` | | +| `VLSEG3E32V` | | +| `VLSEG3E64FFV` | | +| `VLSEG3E64V` | | +| `VLSEG3E8FFV` | | +| `VLSEG3E8V` | | +| `VLSEG4E16FFV` | | +| `VLSEG4E16V` | | +| `VLSEG4E32FFV` | | +| `VLSEG4E32V` | | +| `VLSEG4E64FFV` | | +| `VLSEG4E64V` | | +| `VLSEG4E8FFV` | | +| `VLSEG4E8V` | | +| `VLSEG5E16FFV` | | +| `VLSEG5E16V` | | +| `VLSEG5E32FFV` | | +| `VLSEG5E32V` | | +| `VLSEG5E64FFV` | | +| `VLSEG5E64V` | | +| `VLSEG5E8FFV` | | +| `VLSEG5E8V` | | +| `VLSEG6E16FFV` | | +| `VLSEG6E16V` | | +| `VLSEG6E32FFV` | | +| `VLSEG6E32V` | | +| `VLSEG6E64FFV` | | +| `VLSEG6E64V` | | +| `VLSEG6E8FFV` | | +| `VLSEG6E8V` | | +| `VLSEG7E16FFV` | | +| `VLSEG7E16V` | | +| `VLSEG7E32FFV` | | +| `VLSEG7E32V` | | +| `VLSEG7E64FFV` | | +| `VLSEG7E64V` | | +| `VLSEG7E8FFV` | | +| `VLSEG7E8V` | | +| `VLSEG8E16FFV` | | +| `VLSEG8E16V` | | +| `VLSEG8E32FFV` | | +| `VLSEG8E32V` | | +| `VLSEG8E64FFV` | | +| `VLSEG8E64V` | | +| `VLSEG8E8FFV` | | +| `VLSEG8E8V` | | +| `VLSSEG2E16V` | | +| `VLSSEG2E32V` | | +| `VLSSEG2E64V` | | +| `VLSSEG2E8V` | | +| `VLSSEG3E16V` | | +| `VLSSEG3E32V` | | +| `VLSSEG3E64V` | | +| `VLSSEG3E8V` | | +| `VLSSEG4E16V` | | +| `VLSSEG4E32V` | | +| `VLSSEG4E64V` | | +| `VLSSEG4E8V` | | +| `VLSSEG5E16V` | | +| `VLSSEG5E32V` | | +| `VLSSEG5E64V` | | +| `VLSSEG5E8V` | | +| `VLSSEG6E16V` | | +| `VLSSEG6E32V` | | +| `VLSSEG6E64V` | | +| `VLSSEG6E8V` | | +| `VLSSEG7E16V` | | +| `VLSSEG7E32V` | | +| `VLSSEG7E64V` | | +| `VLSSEG7E8V` | | +| `VLSSEG8E16V` | | +| `VLSSEG8E32V` | | +| `VLSSEG8E64V` | | +| `VLSSEG8E8V` | | +| `VLUXEI16V` | | +| `VLUXEI32V` | | +| `VLUXEI64V` | | +| `VLUXEI8V` | | +| `VLUXSEG2EI16V` | | +| `VLUXSEG2EI32V` | | +| `VLUXSEG2EI64V` | | +| `VLUXSEG2EI8V` | | +| `VLUXSEG3EI16V` | | +| `VLUXSEG3EI32V` | | +| `VLUXSEG3EI64V` | | +| `VLUXSEG3EI8V` | | +| `VLUXSEG4EI16V` | | +| `VLUXSEG4EI32V` | | +| `VLUXSEG4EI64V` | | +| `VLUXSEG4EI8V` | | +| `VLUXSEG5EI16V` | | +| `VLUXSEG5EI32V` | | +| `VLUXSEG5EI64V` | | +| `VLUXSEG5EI8V` | | +| `VLUXSEG6EI16V` | | +| `VLUXSEG6EI32V` | | +| `VLUXSEG6EI64V` | | +| `VLUXSEG6EI8V` | | +| `VLUXSEG7EI16V` | | +| `VLUXSEG7EI32V` | | +| `VLUXSEG7EI64V` | | +| `VLUXSEG7EI8V` | | +| `VLUXSEG8EI16V` | | +| `VLUXSEG8EI32V` | | +| `VLUXSEG8EI64V` | | +| `VLUXSEG8EI8V` | | +| `VMACCVV` | | +| `VMACCVX` | | +| `VMADCVI` | | +| `VMADCVIM` | | +| `VMADCVV` | | +| `VMADCVVM` | | +| `VMADCVX` | | +| `VMADCVXM` | | +| `VMADDVV` | | +| `VMADDVX` | | +| `VMANDMM` | | +| `VMANDNMM` | | +| `VMAXUVV` | | +| `VMAXUVX` | | +| `VMAXVV` | | +| `VMAXVX` | | +| `VMCLRM` | | +| `VMERGEVIM` | | +| `VMERGEVVM` | | +| `VMERGEVXM` | | +| `VMFEQVF` | | +| `VMFEQVV` | | +| `VMFGEVF` | | +| `VMFGEVV` | | +| `VMFGTVF` | | +| `VMFGTVV` | | +| `VMFLEVF` | | +| `VMFLEVV` | | +| `VMFLTVF` | | +| `VMFLTVV` | | +| `VMFNEVF` | | +| `VMFNEVV` | | +| `VMINUVV` | | +| `VMINUVX` | | +| `VMINVV` | | +| `VMINVX` | | +| `VMMVM` | | +| `VMNANDMM` | | +| `VMNORMM` | | +| `VMNOTM` | | +| `VMORMM` | | +| `VMORNMM` | | +| `VMSBCVV` | | +| `VMSBCVVM` | | +| `VMSBCVX` | | +| `VMSBCVXM` | | +| `VMSBFM` | | +| `VMSEQVI` | | +| `VMSEQVV` | | +| `VMSEQVX` | | +| `VMSETM` | | +| `VMSGEUVI` | | +| `VMSGEUVV` | | +| `VMSGEVI` | | +| `VMSGEVV` | | +| `VMSGTUVI` | | +| `VMSGTUVV` | | +| `VMSGTUVX` | | +| `VMSGTVI` | | +| `VMSGTVV` | | +| `VMSGTVX` | | +| `VMSIFM` | | +| `VMSLEUVI` | | +| `VMSLEUVV` | | +| `VMSLEUVX` | | +| `VMSLEVI` | | +| `VMSLEVV` | | +| `VMSLEVX` | | +| `VMSLTUVI` | | +| `VMSLTUVV` | | +| `VMSLTUVX` | | +| `VMSLTVI` | | +| `VMSLTVV` | | +| `VMSLTVX` | | +| `VMSNEVI` | | +| `VMSNEVV` | | +| `VMSNEVX` | | +| `VMSOFM` | | +| `VMULHSUVV` | | +| `VMULHSUVX` | | +| `VMULHUVV` | | +| `VMULHUVX` | | +| `VMULHVV` | | +| `VMULHVX` | | +| `VMULVV` | | +| `VMULVX` | | +| `VMV1RV` | | +| `VMV2RV` | | +| `VMV4RV` | | +| `VMV8RV` | | +| `VMVSX` | | +| `VMVVI` | | +| `VMVVV` | | +| `VMVVX` | | +| `VMVXS` | | +| `VMXNORMM` | | +| `VMXORMM` | | +| `VNCLIPUWI` | | +| `VNCLIPUWV` | | +| `VNCLIPUWX` | | +| `VNCLIPWI` | | +| `VNCLIPWV` | | +| `VNCLIPWX` | | +| `VNCVTXXW` | | +| `VNEGV` | | +| `VNMSACVV` | | +| `VNMSACVX` | | +| `VNMSUBVV` | | +| `VNMSUBVX` | | +| `VNOTV` | | +| `VNSRAWI` | | +| `VNSRAWV` | | +| `VNSRAWX` | | +| `VNSRLWI` | | +| `VNSRLWV` | | +| `VNSRLWX` | | +| `VORVI` | | +| `VORVV` | | +| `VORVX` | | +| `VREDANDVS` | | +| `VREDMAXUVS` | | +| `VREDMAXVS` | | +| `VREDMINUVS` | | +| `VREDMINVS` | | +| `VREDORVS` | | +| `VREDSUMVS` | | +| `VREDXORVS` | | +| `VREMUVV` | | +| `VREMUVX` | | +| `VREMVV` | | +| `VREMVX` | | +| `VRGATHEREI16VV` | | +| `VRGATHERVI` | | +| `VRGATHERVV` | | +| `VRGATHERVX` | | +| `VRSUBVI` | | +| `VRSUBVX` | | +| `VS1RV` | | +| `VS2RV` | | +| `VS4RV` | | +| `VS8RV` | | +| `VSADDUVI` | | +| `VSADDUVV` | | +| `VSADDUVX` | | +| `VSADDVI` | | +| `VSADDVV` | | +| `VSADDVX` | | +| `VSBCVVM` | | +| `VSBCVXM` | | +| `VSE16V` | | +| `VSE32V` | | +| `VSE64V` | | +| `VSE8V` | | +| `VSETIVLI` | | +| `VSETVL` | | +| `VSETVLI` | | +| `VSEXTVF2` | | +| `VSEXTVF4` | | +| `VSEXTVF8` | | +| `VSLIDE1DOWNVX` | | +| `VSLIDE1UPVX` | | +| `VSLIDEDOWNVI` | | +| `VSLIDEDOWNVX` | | +| `VSLIDEUPVI` | | +| `VSLIDEUPVX` | | +| `VSLLVI` | | +| `VSLLVV` | | +| `VSLLVX` | | +| `VSMULVV` | | +| `VSMULVX` | | +| `VSMV` | | +| `VSOXEI16V` | | +| `VSOXEI32V` | | +| `VSOXEI64V` | | +| `VSOXEI8V` | | +| `VSOXSEG2EI16V` | | +| `VSOXSEG2EI32V` | | +| `VSOXSEG2EI64V` | | +| `VSOXSEG2EI8V` | | +| `VSOXSEG3EI16V` | | +| `VSOXSEG3EI32V` | | +| `VSOXSEG3EI64V` | | +| `VSOXSEG3EI8V` | | +| `VSOXSEG4EI16V` | | +| `VSOXSEG4EI32V` | | +| `VSOXSEG4EI64V` | | +| `VSOXSEG4EI8V` | | +| `VSOXSEG5EI16V` | | +| `VSOXSEG5EI32V` | | +| `VSOXSEG5EI64V` | | +| `VSOXSEG5EI8V` | | +| `VSOXSEG6EI16V` | | +| `VSOXSEG6EI32V` | | +| `VSOXSEG6EI64V` | | +| `VSOXSEG6EI8V` | | +| `VSOXSEG7EI16V` | | +| `VSOXSEG7EI32V` | | +| `VSOXSEG7EI64V` | | +| `VSOXSEG7EI8V` | | +| `VSOXSEG8EI16V` | | +| `VSOXSEG8EI32V` | | +| `VSOXSEG8EI64V` | | +| `VSOXSEG8EI8V` | | +| `VSRAVI` | | +| `VSRAVV` | | +| `VSRAVX` | | +| `VSRLVI` | | +| `VSRLVV` | | +| `VSRLVX` | | +| `VSSE16V` | | +| `VSSE32V` | | +| `VSSE64V` | | +| `VSSE8V` | | +| `VSSEG2E16V` | | +| `VSSEG2E32V` | | +| `VSSEG2E64V` | | +| `VSSEG2E8V` | | +| `VSSEG3E16V` | | +| `VSSEG3E32V` | | +| `VSSEG3E64V` | | +| `VSSEG3E8V` | | +| `VSSEG4E16V` | | +| `VSSEG4E32V` | | +| `VSSEG4E64V` | | +| `VSSEG4E8V` | | +| `VSSEG5E16V` | | +| `VSSEG5E32V` | | +| `VSSEG5E64V` | | +| `VSSEG5E8V` | | +| `VSSEG6E16V` | | +| `VSSEG6E32V` | | +| `VSSEG6E64V` | | +| `VSSEG6E8V` | | +| `VSSEG7E16V` | | +| `VSSEG7E32V` | | +| `VSSEG7E64V` | | +| `VSSEG7E8V` | | +| `VSSEG8E16V` | | +| `VSSEG8E32V` | | +| `VSSEG8E64V` | | +| `VSSEG8E8V` | | +| `VSSRAVI` | | +| `VSSRAVV` | | +| `VSSRAVX` | | +| `VSSRLVI` | | +| `VSSRLVV` | | +| `VSSRLVX` | | +| `VSSSEG2E16V` | | +| `VSSSEG2E32V` | | +| `VSSSEG2E64V` | | +| `VSSSEG2E8V` | | +| `VSSSEG3E16V` | | +| `VSSSEG3E32V` | | +| `VSSSEG3E64V` | | +| `VSSSEG3E8V` | | +| `VSSSEG4E16V` | | +| `VSSSEG4E32V` | | +| `VSSSEG4E64V` | | +| `VSSSEG4E8V` | | +| `VSSSEG5E16V` | | +| `VSSSEG5E32V` | | +| `VSSSEG5E64V` | | +| `VSSSEG5E8V` | | +| `VSSSEG6E16V` | | +| `VSSSEG6E32V` | | +| `VSSSEG6E64V` | | +| `VSSSEG6E8V` | | +| `VSSSEG7E16V` | | +| `VSSSEG7E32V` | | +| `VSSSEG7E64V` | | +| `VSSSEG7E8V` | | +| `VSSSEG8E16V` | | +| `VSSSEG8E32V` | | +| `VSSSEG8E64V` | | +| `VSSSEG8E8V` | | +| `VSSUBUVV` | | +| `VSSUBUVX` | | +| `VSSUBVV` | | +| `VSSUBVX` | | +| `VSUBVV` | | +| `VSUBVX` | | +| `VSUXEI16V` | | +| `VSUXEI32V` | | +| `VSUXEI64V` | | +| `VSUXEI8V` | | +| `VSUXSEG2EI16V` | | +| `VSUXSEG2EI32V` | | +| `VSUXSEG2EI64V` | | +| `VSUXSEG2EI8V` | | +| `VSUXSEG3EI16V` | | +| `VSUXSEG3EI32V` | | +| `VSUXSEG3EI64V` | | +| `VSUXSEG3EI8V` | | +| `VSUXSEG4EI16V` | | +| `VSUXSEG4EI32V` | | +| `VSUXSEG4EI64V` | | +| `VSUXSEG4EI8V` | | +| `VSUXSEG5EI16V` | | +| `VSUXSEG5EI32V` | | +| `VSUXSEG5EI64V` | | +| `VSUXSEG5EI8V` | | +| `VSUXSEG6EI16V` | | +| `VSUXSEG6EI32V` | | +| `VSUXSEG6EI64V` | | +| `VSUXSEG6EI8V` | | +| `VSUXSEG7EI16V` | | +| `VSUXSEG7EI32V` | | +| `VSUXSEG7EI64V` | | +| `VSUXSEG7EI8V` | | +| `VSUXSEG8EI16V` | | +| `VSUXSEG8EI32V` | | +| `VSUXSEG8EI64V` | | +| `VSUXSEG8EI8V` | | +| `VWADDUVV` | | +| `VWADDUVX` | | +| `VWADDUWV` | | +| `VWADDUWX` | | +| `VWADDVV` | | +| `VWADDVX` | | +| `VWADDWV` | | +| `VWADDWX` | | +| `VWCVTUXXV` | | +| `VWCVTXXV` | | +| `VWMACCSUVV` | | +| `VWMACCSUVX` | | +| `VWMACCUSVX` | | +| `VWMACCUVV` | | +| `VWMACCUVX` | | +| `VWMACCVV` | | +| `VWMACCVX` | | +| `VWMULSUVV` | | +| `VWMULSUVX` | | +| `VWMULUVV` | | +| `VWMULUVX` | | +| `VWMULVV` | | +| `VWMULVX` | | +| `VWREDSUMUVS` | | +| `VWREDSUMVS` | | +| `VWSUBUVV` | | +| `VWSUBUVX` | | +| `VWSUBUWV` | | +| `VWSUBUWX` | | +| `VWSUBVV` | | +| `VWSUBVX` | | +| `VWSUBWV` | | +| `VWSUBWX` | | +| `VXORVI` | | +| `VXORVV` | | +| `VXORVX` | | +| `VZEXTVF2` | | +| `VZEXTVF4` | | +| `VZEXTVF8` | | +| `WFI` | | +| `WORD` | | +| `XNOR` | | +| `XOR` | Bitwise XOR | +| `XORI` | XOR immediate | +| `ZEXTH` | | + +Recognised: 975 mnemonics.