feat(arch): add the VEX encoder to the extension layer

Assisted-by: GLM 5.3 Flash
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petrbalvin committed 2026-10-07 19:49:15 +02:00
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commit 96000dd64d
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@@ -1033,6 +1033,16 @@ type ExtInstr struct {
SveMode uint8 // extMemNone or one of the extMem* modes below
SveShift int // the required <<s, or the access-size shift
SveBase ExtArrangement // the vector base's element size, where it has one
// Vex records that the amd64 entry encodes through the two-byte VEX
// prefix the AVX extensions carry, not through EVEX: a family with no
// AVX-512 form, the AVX-VNNI-INT16 dot products, lays its C4 word over
// five bytes, R/X/B inverted and the five-bit map in byte one, W and
// vvvv complemented and L and pp in byte two. A VEX row takes no mask,
// broadcast or rounding decoration and no register above 15, and its
// memory forms keep the classic displacement choices no VEX word
// scales. Every existing entry carries the zero value and encodes
// through EVEX.
Vex bool
}
// The arm64 gather/scatter addressing modes, the values SveMode carries.