feat(asm): extend arm64 encoder with atomics, bitfield, SIMD and more test kernels

Assisted-by: MiMo V2.5 Pro

testdata/verify/branch_arm64.s

@@ -0,0 +1,27 @@
+// Copyright (c) 2026 Petr Balvín <opensource@petrbalvin.org> (https://petrbalvin.org)
+// SPDX-License-Identifier: BSD-3-Clause
+
+#include "textflag.h"
+
+// branch exercises all conditional branch forms and jump chain folding.
+TEXT ·branch(SB), NOSPLIT, $0-0
+	BEQ	done
+	BNE	skip
+	BGE	done
+	BLT	done
+	BGT	done
+	BLE	done
+	BCS	done
+	BCC	done
+	BMI	done
+	BPL	done
+	BVS	done
+	BVC	done
+	BHI	done
+	BLS	done
+skip:
+	B	loop
+loop:
+	ADD	R4, R5
+done:
+	RET

testdata/verify/call_arm64.s

@@ -0,0 +1,10 @@
+// Copyright (c) 2026 Petr Balvín <opensource@petrbalvin.org> (https://petrbalvin.org)
+// SPDX-License-Identifier: BSD-3-Clause
+
+#include "textflag.h"
+
+// caller exercises BL to an external symbol (produces a relocation).
+TEXT ·caller(SB), NOSPLIT, $0-0
+	BL	other(SB)
+	ADD	R4, R5
+	RET

testdata/verify/movimm_arm64.s

@@ -0,0 +1,21 @@
+// Copyright (c) 2026 Petr Balvín <opensource@petrbalvin.org> (https://petrbalvin.org)
+// SPDX-License-Identifier: BSD-3-Clause
+
+#include "textflag.h"
+
+// movimm exercises MOV with various immediate values.
+TEXT ·movimm(SB), NOSPLIT, $0-0
+	MOVD	$0, R0
+	MOVD	$1, R1
+	MOVD	$42, R2
+	MOVD	$255, R3
+	MOVD	$256, R4
+	MOVD	$0xFFFF, R5
+	MOVD	$0x12345678, R6
+	MOVD	$0x123456789ABCDEF0, R7
+	MOVD	$-1, R8
+	MOVD	$-2, R9
+	MOVW	$0, R10
+	MOVW	$100, R11
+	MOVW	$0x12345, R12
+	RET