feat(asm): assemble the extended instruction layer on arm64
Assisted-by: GLM 5.3 Flash
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@@ -9,6 +9,7 @@ import (
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"strconv"
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"strings"
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"sourcedock.dev/petrbalvin/gasm-sdk/arch"
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"sourcedock.dev/petrbalvin/gasm-sdk/ast"
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)
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@@ -269,6 +270,13 @@ func arm64InstrSize(instr *ast.Instr, fi arm64FrameInfo, pos int) int {
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case "NO_LOCAL_POINTERS", "GO_ARGS", "GO_RESULTS_INITIALIZED", "END", "FUNCDATA", "PCDATA":
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return 0
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}
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// The extended-instruction layer is one instruction word in every form
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// the registry takes: pass 1 must size a pinned statement at the 4 bytes
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// the encoder will lay down, ahead of the scalar immediate expansions
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// below, whose sizes would misread a Z destination (asm/arm64_ext.go).
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if _, pinned, _ := arm64ExtStatement(mnem, ops); pinned {
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return 4
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}
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switch mnem {
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case "MOV", "MOVD", "MOVW", "MOVWU", "MOVH", "MOVHU", "MOVB", "MOVBU",
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"FMOVS", "FMOVD":
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@@ -307,6 +315,23 @@ func encodeARM64Instr(instr *ast.Instr, pc int, offsets map[string]int, fi arm64
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mnem := strings.ToUpper(instr.Mnemonic.Text)
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ops := instr.Operands
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// The extended-instruction layer: a statement whose mnemonic is
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// registered in the extension registry and whose operands carry a
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// scalable vector or predicate register encodes through the registry,
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// before any scalar route can misread those operands. Scalar, NEON and
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// FP operand lists never pin, so everything below runs exactly as it
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// did (asm/arm64_ext.go).
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if extops, pinned, convErr := arm64ExtStatement(mnem, ops); pinned {
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if convErr != nil {
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return nil, convErr
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}
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code, encErr := EncodeExtension(arch.ARM64, mnem, extops...)
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if encErr != nil {
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return nil, encErr
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}
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return code, nil
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}
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// Pseudo-instructions and special cases first.
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switch mnem {
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case "RET":
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