fix(asm): carry the arm64 immediate to ZR through MOVZ

Assisted-by: GLM 5.3 Flash

asm/arm64_encode_test.go

@@ -1979,6 +1979,35 @@ func TestArm64SimdArrangementRejections(t *testing.T) {
 	}
 }
 
+// TestArm64MovImmZR pins the immediate-to-ZR spellings against `go tool asm`
+// words: omovconst takes the bitmask path only for a real register, so an
+// immediate to ZR rides the MOVZ/MOVN sequence carrying the value.
+func TestArm64MovImmZR(t *testing.T) {
+	got := arm64Words(t,
+		"\tMOVW $1, ZR\n"+
+			"\tMOVD $1, ZR\n"+
+			"\tMOVD $0x123456789, ZR\n"+
+			"\tMOVD $-1, ZR\n"+
+			"\tMOVD $0, ZR\n")
+	want := []uint32{
+		0x5280003f, // MOVZ W31, #1
+		0xd280003f, // MOVZ X31, #1
+		0xd28cf13f, // MOVZ X31, #26505
+		0xf2a468bf, // MOVK $(9029<<16), X31
+		0xf2c0003f, // MOVK $(1<<32), X31
+		0x9280001f, // MOVN X31, #0
+		0xaa1f03ff, // ORR X31, XZR, XZR
+		0xd65f03c0, // RET
+	}
+	if len(got) != len(want) {
+		t.Fatalf("word count = %d, want %d", len(got), len(want))
+	}
+	for i := range want {
+		if got[i] != want[i] {
+			t.Errorf("word %d = %08x, want %08x", i, got[i], want[i])
+		}
+	}
+}
 
 // TestArm64ConRn pins the MOVD $con(Rn), Rd lowering against `go tool asm`
 // words: the single ADD/SUB inside the addcon band, the hi<<12 plus lo pair