feat(arm64): encode pairs, atomics, crypto, system and NEON slices

Assisted-by: GLM 5.3 Flash

arch/arm64.go

@@ -150,6 +150,33 @@ func arm64Curated() []Instr {
 		t = append(t, i(op, "Atomic memory operation"))
 	}
 
+	// Register-pair loads and stores.
+	for _, op := range []string{"LDP", "STP", "LDPW", "STPW", "FLDPD", "FSTPD"} {
+		t = append(t, ic(op, "Register-pair load or store", 2, 2))
+	}
+
+	// Cache maintenance and prefetch.
+	t = append(t, i("DC", "Data cache maintenance"))
+	t = append(t, i("PRFM", "Memory prefetch"))
+	for _, op := range []string{"LDADDAL", "LDCLRAL", "LDORAL", "SWPAL"} {
+		t = append(t, i(op, "Atomic memory operation with acquire and release semantics"))
+	}
+
+	// Cryptographic extensions.
+	for _, op := range []string{"AESE", "AESD", "AESMC", "AESIMC"} {
+		t = append(t, i(op, "AES round"))
+	}
+	for _, op := range []string{
+		"SHA1C", "SHA1P", "SHA1M", "SHA1H", "SHA1SU0", "SHA1SU1",
+		"SHA256H", "SHA256H2", "SHA256SU0", "SHA256SU1",
+		"SHA512H", "SHA512H2", "SHA512SU0", "SHA512SU1",
+	} {
+		t = append(t, i(op, "SHA round"))
+	}
+	for _, op := range []string{"VEOR3", "VBCAX", "VXAR", "VRAX1"} {
+		t = append(t, i(op, "Three-way XOR / rotate crypto vector operation"))
+	}
+
 	// Floating-point scalar.
 	for _, op := range []string{
 		"FADD", "FSUB", "FMUL", "FDIV", "FNEG", "FABS", "FSQRT", "FMIN", "FMAX",