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feat(arch): the SVE multiple-structure loads and stores

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Assisted-by: GLM 5.3 Flash
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petrbalvin committed 2026-10-07 20:35:41 +02:00
1 parent 82dbf087a8
commit cdc3a75c88
5 files changed
+244 -5
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arch/arm64_ext_test.go
+10
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@@ -1551,6 +1551,16 @@ func TestArm64ExtStage4Golden(t *testing.T) {
{"ZBFSUB Z7.H, Z6.H, Z23.H", "ZBFSUB", ExtFormVectorsZm, ExtQualNone, ExtArrH,
[]ExtOperand{ExtVector(7, ExtArrH), ExtVector(6, ExtArrH), ExtVector(23, ExtArrH)},
0x650704d7},
// The multiple-structure loads and stores.
{"ZLD2B (R6)(R14), P4.Z, [Z13.B, Z14.B]", "ZLD2B", ExtFormSveLoad, ExtQualNone, ExtArrB,
[]ExtOperand{ExtSveMemPair(6, 0, 14, false), ExtPredicate(4, ExtQualZeroing), ExtOperand{Kind: ExtZReg, Reg: 13, Arr: ExtArrB, List: 2}},
0xa426d1cd},
{"ZLD4D (R6<<3)(R14), P4.Z, [Z13.D, Z14.D, Z15.D, Z16.D]", "ZLD4D", ExtFormSveLoad, ExtQualNone, ExtArrD,
[]ExtOperand{ExtSveMemPair(6, 3, 14, false), ExtPredicate(4, ExtQualZeroing), ExtOperand{Kind: ExtZReg, Reg: 13, Arr: ExtArrD, List: 4}},
0xa5e6d1cd},
{"ZST2Q [Z8.Q, Z9.Q], P3, (R6<<4)(RSP)", "ZST2Q", ExtFormSveStore, ExtQualNone, ExtArrQ,
[]ExtOperand{ExtOperand{Kind: ExtZReg, Reg: 8, Arr: ExtArrQ, List: 2}, ExtPredicateSized(3, ExtArrNone), ExtSveMemPair(6, 4, 31, true)},
0xe4660fe8},
} {
in := extInstructionMeta(t, tt.mnem, tt.form, tt.qual, tt.arr)
got, err := in.Encode(tt.ops)