feat(arch): add the scalar FP16 memory forms to the amd64 extension layer

Assisted-by: GLM 5.3 Flash
This commit is contained in:
petrbalvin committed 2026-10-07 01:35:48 +02:00
1 parent 7d69dda874
commit d275dee3ae
3 files changed
+228 -20

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+4 -4
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@@ -25,8 +25,8 @@ func TestAmd64ExtensionRegistry(t *testing.T) {
{"VDPBF16PS", 3},
{"VP2INTERSECTD", 3},
{"VP2INTERSECTQ", 3},
{"VMOVSH", 1},
{"VMOVW", 2},
{"VMOVSH", 3},
{"VMOVW", 4},
{"VADDSH", 1},
{"VSQRTSH", 1},
{"VCOMISH", 1},
@@ -54,8 +54,8 @@ func TestAmd64ExtensionRegistry(t *testing.T) {
t.Errorf("the %s lookup is not case-insensitive", tt.mnem)
}
}
if got := arch.Extensions(arch.AMD64); len(got) != 66 {
t.Errorf("the amd64 layer registers %d instructions, want 66", len(got))
if got := arch.Extensions(arch.AMD64); len(got) != 70 {
t.Errorf("the amd64 layer registers %d instructions, want 70", len(got))
}
if _, ok := LookupExtension(arch.AMD64, "NOSUCHINSTR"); ok {
t.Error("a non-extended mnemonic resolved")