feat(asm): encode the arm64 Q-width FP load and store

FMOVQ routes through the MOV load/store machinery in the plain, post-index,
pre-index and static-symbol forms.  The Q width carries its size in the opc
field, so the store spelling is opc=10 and the access scales by sixteen;
both come from helpers now instead of the size exponent.  The static-symbol
form takes the toolchain's twelve-byte ADRP + ADD + access fallback with the
R_ADDRARM64 pair.  The register-to-register and immediate forms stay
rejected, matching the toolchain's own table.

Assisted-by: GLM 5.3 Flash

testdata/verify/qmov_arm64.s

@@ -0,0 +1,49 @@
+// Copyright (c) 2026 Petr Balvín <opensource@petrbalvin.org> (https://petrbalvin.org)
+// SPDX-License-Identifier: BSD-3-Clause
+
+// Differential kernel for the arm64 Q-width FP move: the FMOVQ load and
+// store in the plain, post-index and pre-index forms, against scaled and
+// unscaled offsets, and against static symbols.  Every function is
+// byte-compared against go tool asm.
+
+#include "textflag.h"
+
+// func writeback()
+TEXT ·writeback(SB), NOSPLIT, $0-0
+	FMOVQ.P F13, 11(R10)
+	FMOVQ.W F15, 11(R20)
+	FMOVS.P F20, 4(R0)
+	FMOVS.W F20, 4(R0)
+	FMOVD.P F20, 8(R1)
+	FMOVD.W F20, 8(R1)
+	FMOVQ.P 11(R10), F13
+	FMOVQ.W 11(R20), F15
+	FMOVS.P 8(R0), F20
+	FMOVS.W 8(R0), F20
+	FMOVD.W 8(R1), F20
+	RET
+
+// func plain()
+TEXT ·plain(SB), NOSPLIT, $0-0
+	FMOVQ F0, 32(R5)
+	FMOVQ F10, 65520(R10)
+	FMOVQ F11, 64(RSP)
+	FMOVQ F11, 8(R20)
+	FMOVQ F11, 4(R20)
+	FMOVQ 32(R5), F2
+	FMOVQ 65520(R10), F10
+	FMOVQ 64(RSP), F11
+	FMOVD F1, 8(R2)
+	FMOVD 8(R2), F1
+	RET
+
+// func symbols()
+TEXT ·symbols(SB), NOSPLIT, $0-0
+	FMOVQ F5, x(SB)
+	FMOVQ F5, x+8(SB)
+	FMOVQ x+8(SB), F5
+	FMOVQ x(SB), F5
+	RET
+
+// data the symbol forms refer to
+GLOBL x(SB), NOPTR, $16