From e5035d92e99d7926e9c7ded6a3048266a719b249 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Petr=20Balv=C3=ADn?= <opensource@petrbalvin.org>
Date: Wed, 7 Oct 2026 12:49:08 +0200
Subject: [PATCH] fix(asm): reject the offset on the loong64 register-indexed
 memory form

Assisted-by: GLM 5.3
---
 asm/loong64_assemble.go | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/asm/loong64_assemble.go b/asm/loong64_assemble.go
index fbd1a75..5599b2c 100644
--- a/asm/loong64_assemble.go
+++ b/asm/loong64_assemble.go
@@ -1422,6 +1422,11 @@ func encodeLOONG64Mov(instr *ast.Instr, mnem string, fi loong64FrameInfo, relocs
 
 	// Register-offset addressing: MOVx (rj)(rk), rd / MOVx rd, (rj)(rk).
 	if src.Addr.Index != "" && !isMemOperand(dst) {
+		if src.Addr.HasOff {
+			// The toolchain rejects off(rj)(rk) with an illegal
+			// combination; the offset would be silently dropped here.
+			return nil, fmt.Errorf("%s: the register-indexed form takes no offset", mnem)
+		}
 		rd := l64Reg(dst)
 		rj, rk := loong64RegNum(src.Addr.Base), loong64RegNum(src.Addr.Index)
 		if rd < 0 || rj < 0 || rk < 0 {
@@ -1434,6 +1439,10 @@ func encodeLOONG64Mov(instr *ast.Instr, mnem string, fi loong64FrameInfo, relocs
 		return l64wordLE(l64rrr(op.ld, rk, rj, rd)), nil
 	}
 	if dst.Addr.Index != "" && !isMemOperand(src) {
+		if dst.Addr.HasOff {
+			// The store twin of the load rejection above.
+			return nil, fmt.Errorf("%s: the register-indexed form takes no offset", mnem)
+		}
 		rs := l64Reg(src)
 		rj, rk := loong64RegNum(dst.Addr.Base), loong64RegNum(dst.Addr.Index)
 		if rs < 0 || rj < 0 || rk < 0 {