feat(riscv): add RISC-V RV64A, FP and CSR instruction support

Assisted-by: Kimi K3

testdata/lrsc_cvt_riscv64.s

@@ -0,0 +1,37 @@
+// Copyright (c) 2026 Petr Balvín <opensource@petrbalvin.org> (https://petrbalvin.org)
+// SPDX-License-Identifier: BSD-3-Clause
+
+#include "textflag.h"
+
+// func casLoop(ptr *int64, old, new int64) bool
+// Compare-and-swap using LR/SC.
+TEXT ·casLoop(SB), NOSPLIT, $0-32
+cas_retry:
+	LD a+0(FP), A0
+	LRD (A0), A1
+	LD b+8(FP), A2
+	BNE A1, A2, cas_fail
+	LD c+16(FP), A3
+	SCD A3, (A0), A4
+	BNE A4, X0, cas_retry
+	ADDI X0, $1, A5
+	SD A5, ret+24(FP)
+	RET
+cas_fail:
+	SD X0, ret+24(FP)
+	RET
+
+// func intToFloat(x int64) float64
+TEXT ·intToFloat(SB), NOSPLIT, $0-16
+	LD a+0(FP), A0
+	FCVTDL A0, FA0
+	FSD FA0, ret+8(FP)
+	RET
+
+// func compare(a, b float64) bool
+TEXT ·compare(SB), NOSPLIT, $0-24
+	FLD a+0(FP), FA0
+	FLD b+8(FP), FA1
+	FLTD FA0, FA1, A0
+	SD A0, ret+16(FP)
+	RET