test(disasm): pin the vector spaces the decoder refuses
The RISC-V vector extension and the LoongArch LSX/LASX families carry no x/arch decode tables, and the loong64 WORD directive is no instruction: all three stay on the placeholder. The pins record today's refusal with the corpus rows that assemble the same bytes, so a decoder bump that learns one of these spaces flips a row here and asks for the naming pass to cover it. Assisted-by: GLM 5.3
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@@ -128,6 +128,44 @@ func TestBranchTargetConvention(t *testing.T) {
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// of the disassembler's text, and the fixtures carry it stripped.
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// of the disassembler's text, and the fixtures carry it stripped.
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}
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}
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// TestVectorSpaceStaysRejected pins the instruction spaces x/arch carries
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// no decode tables for at all: the RISC-V vector extension (riscv64.s
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// spells 40 such rows) and the LoongArch LSX/LASX vector families
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// (loong64enc1.s spells 807), plus the loong64 WORD data directive, which
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// is no instruction. The corpus assembles every one of these encodings,
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// so the rows are honest negatives: they pin today's refusal, and a
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// decoder bump that learns one of these spaces flips a row here and asks
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// for the naming pass to cover it.
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func TestVectorSpaceStaysRejected(t *testing.T) {
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for _, tt := range []struct {
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a arch.Arch
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code []byte
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}{
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// riscv64.s: VANDNVV V1, V2, V3 // d7812006 and VCLMULVV V1,
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// V2, V3 // d7a12032.
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{arch.RISCV, []byte{0xd7, 0x81, 0x20, 0x06}},
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{arch.RISCV, []byte{0xd7, 0xa1, 0x20, 0x32}},
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// loong64enc1.s: VMOVQ V2, (R5)(R5) // a2144438 and the XV
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// form // 82144838.
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{arch.LOONG64, []byte{0xa2, 0x14, 0x44, 0x38}},
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{arch.LOONG64, []byte{0x82, 0x14, 0x48, 0x38}},
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// loong64enc1.s: VADDW V1, V2, V3 // 43040b70.
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{arch.LOONG64, []byte{0x43, 0x04, 0x0b, 0x70}},
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// loong64enc1.s: WORD $74565 // 45230100: a data word the
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// assembler emits verbatim, no instruction to decode.
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{arch.LOONG64, []byte{0x45, 0x23, 0x01, 0x00}},
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} {
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ins, err := Decode(tt.a, tt.code, 0)
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if err != nil {
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t.Errorf("%s % x: %v", tt.a, tt.code, err)
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continue
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}
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if ins.Text != "???" {
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t.Errorf("%s % x: %q, want the placeholder", tt.a, tt.code, ins.Text)
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}
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}
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}
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// relativeBranch reports whether the rendered text carries a PC-relative
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// relativeBranch reports whether the rendered text carries a PC-relative
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// or position-dependent target. Such an operand is an address, not a
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// or position-dependent target. Such an operand is an address, not a
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// datum: it is faithful to the bytes only at the address the instruction
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// datum: it is faithful to the bytes only at the address the instruction
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