fix(asm): complete RISC-V compressed loads/stores and word arithmetic

Assisted-by: DeepSeek V4 Pro

asm/riscv_encode_test.go

@@ -81,9 +81,9 @@ TEXT ·mem(SB), NOSPLIT, $0
 	RET
 `)
 	code := assembleRISCVHelper(t, fn)
-	// 4 loads/stores (4B each) + JALR RET (4B) = 20
-	if len(code) != 20 {
-		t.Errorf("expected 20 bytes, got %d", len(code))
+	// Four register-relative loads/stores compress (2B each) + JALR (4B) = 12.
+	if len(code) != 12 {
+		t.Errorf("expected 12 bytes, got %d", len(code))
 	}
 }
 
@@ -400,7 +400,7 @@ func TestRISCV_encodings(t *testing.T) {
 		{"LWU", "LWU (X10), X11\nRET\n", 8},
 		{"SB", "SB X10, (X11)\nRET\n", 8},
 		{"SH", "SH X10, (X11)\nRET\n", 8},
-		{"SW", "SW X10, (X11)\nRET\n", 8},
+		{"SW", "SW X10, (X11)\nRET\n", 6},
 		{"LUI", "LUI X10, $0x12345\nRET\n", 8},
 		{"AUIPC", "AUIPC X10, $0\nRET\n", 8},
 		{"FLW", "FLW (X10), F10\nRET\n", 8},