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feat(riscv64): GOROOT instruction shapes, DATA order and offset expressions

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Assisted-by: GLM 5.3 Flash
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petrbalvin
2026-09-19 19:58:43 +02:00
parent 1e77e58250
commit f37f183577
7 changed files with 310 additions and 95 deletions
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asm/riscv_encode.go
+2
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@@ -328,6 +328,8 @@ var riscvCvtTable = map[string]riscvCvtEnc{
"FCVTSWU": {0x68, 0x1, 0x53}, // uint32 → float32
"FCVTSL": {0x68, 0x2, 0x53}, // int64 → float32
"FCVTSLU": {0x68, 0x3, 0x53}, // uint64 → float32
"FCLASSS": {0x70, 0x0, 0x53}, // classify float32 → GPR mask
"FCLASSD": {0x70, 0x0, 0x53}, // classify float64 → GPR mask
"FCVTDW": {0x69, 0x0, 0x53}, // int32 → float64
"FCVTDWU": {0x69, 0x1, 0x53}, // uint32 → float64
"FCVTDL": {0x69, 0x2, 0x53}, // int64 → float64