test(asm): pin the ADDV16 immediate family the toolchain assembles

Assisted-by: GLM 5.3 Flash

asm/loong64_assemble.go

@@ -872,7 +872,10 @@ func encodeLOONG64Instr(instr *ast.Instr, pc int, offsets map[string]int, fi loo
 
 	case l64Firr16:
 		// ADDV16: INSTR $imm, rd or INSTR $imm, rj, rd; the immediate must be
-		// a multiple of 65536 and is shifted right by 16.
+		// a multiple of 65536 and is shifted right by 16.  Both registers are
+		// general: the toolchain's class match refuses an F, V or X bank
+		// register here ("illegal combination ADDV16 ... FREG ..."), and the
+		// 5-bit numbering would otherwise encode it silently.
 		if len(ops) < 2 || !isImmOperand(ops[0]) {
 			return nil, fmt.Errorf("%s expects an immediate operand", mnem)
 		}
@@ -880,6 +883,11 @@ func encodeLOONG64Instr(instr *ast.Instr, pc int, offsets map[string]int, fi loo
 		if v&0xFFFF != 0 {
 			return nil, fmt.Errorf("%s: the constant must be a multiple of 65536", mnem)
 		}
+		for _, op := range ops[1:] {
+			if c := loong64RegClass(operandRegName(op)); c != l64ClsGR {
+				return nil, fmt.Errorf("%s: illegal combination: the registers must be general", mnem)
+			}
+		}
 		rd := l64Reg(ops[len(ops)-1])
 		rj := rd
 		if len(ops) == 3 {