feat(amd64): encode the GOROOT instruction families
Assisted-by: GLM 5.3 Flash
This commit is contained in:
@@ -546,6 +546,248 @@ func TestEncodableCmovSize(t *testing.T) {
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}
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}
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// TestCarryShiftMulGroundTruth pins the carry-flag ALU family (ADC/SBB with
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// their accumulator immediate forms), the rotate family, MUL/DIV/IDIV and the
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// bit-test family byte for byte against go tool asm (see
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// testdata/verify/scalar_amd64.s).
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func TestCarryShiftMulGroundTruth(t *testing.T) {
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cases := []struct {
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name string
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mnem string
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ops []Operand
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want string
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}{
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{"ADCQ AX,BX", "ADCQ", []Operand{AX, BX}, "4811c3"},
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{"ADCL AX,BX", "ADCL", []Operand{AX, BX}, "11c3"},
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{"ADCB AL,BL", "ADCB", []Operand{AL, BL}, "10c3"},
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{"ADCW AX,BX", "ADCW", []Operand{AX, BX}, "6611c3"},
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{"SBBQ AX,BX", "SBBQ", []Operand{AX, BX}, "4819c3"},
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{"ADCQ $5,BX", "ADCQ", []Operand{Imm(5), BX}, "4883d305"},
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{"ADCQ $300,BX", "ADCQ", []Operand{Imm(300), BX}, "4881d32c010000"},
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{"ADCQ $300,AX", "ADCQ", []Operand{Imm(300), AX}, "48152c010000"},
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{"ADCB $5,AL", "ADCB", []Operand{Imm(5), AL}, "1405"},
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{"SBBQ $300,AX", "SBBQ", []Operand{Imm(300), AX}, "481d2c010000"},
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{"ADCQ AX,(BX)", "ADCQ", []Operand{AX, Ptr(BX, 0, 8)}, "481103"},
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{"ROLQ $3,AX", "ROLQ", []Operand{Imm(3), AX}, "48c1c003"},
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{"ROLL CX,BX", "ROLL", []Operand{CL, BX}, "d3c3"},
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{"RORQ CL,AX", "RORQ", []Operand{CL, AX}, "48d3c8"},
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{"RCRQ $1,BX", "RCRQ", []Operand{Imm(1), BX}, "48d1db"},
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{"RCLQ $3,AX", "RCLQ", []Operand{Imm(3), AX}, "48c1d003"},
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{"RORB CL,BL", "RORB", []Operand{CL, BL}, "d2cb"},
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{"SALQ $2,AX", "SALQ", []Operand{Imm(2), AX}, "48c1e002"},
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{"ROLW $1,AX", "ROLW", []Operand{Imm(1), AX}, "66d1c0"},
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{"MULQ CX", "MULQ", []Operand{CX}, "48f7e1"},
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{"MULL CX", "MULL", []Operand{CX}, "f7e1"},
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{"MULB CL", "MULB", []Operand{CL}, "f6e1"},
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{"DIVL CX", "DIVL", []Operand{CX}, "f7f1"},
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{"IDIVQ CX", "IDIVQ", []Operand{CX}, "48f7f9"},
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{"MULW CX", "MULW", []Operand{CX}, "66f7e1"},
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{"BTQ AX,DX", "BTQ", []Operand{AX, DX}, "480fa3c2"},
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{"BTL AX,DX", "BTL", []Operand{AX, DX}, "0fa3c2"},
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{"BTW AX,DX", "BTW", []Operand{AX, DX}, "660fa3c2"},
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{"BTQ $3,BX", "BTQ", []Operand{Imm(3), BX}, "480fbae303"},
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{"BTQ $3,(AX)", "BTQ", []Operand{Imm(3), Ptr(AX, 0, 8)}, "480fba2003"},
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{"BTSQ $5,BX", "BTSQ", []Operand{Imm(5), BX}, "480fbaeb05"},
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{"BTCQ AX,BX", "BTCQ", []Operand{AX, BX}, "480fbbc3"},
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{"BTRQ $7,BX", "BTRQ", []Operand{Imm(7), BX}, "480fbaf307"},
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}
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for _, c := range cases {
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code, err := Encode(c.mnem, c.ops...)
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if err != nil {
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t.Errorf("%s: Encode: %v", c.name, err)
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continue
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}
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if got := fmt.Sprintf("%x", code); got != c.want {
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t.Errorf("%s = %s, want %s", c.name, got, c.want)
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}
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}
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// The bit-test immediate is an unsigned bit index with the negative
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// spelling accepted, the shuffle convention: BTQ $300 must be rejected.
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if _, err := Encode("BTQ", Imm(300), AX); err == nil {
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t.Errorf("BTQ $300: expected an error, got none")
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}
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}
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// TestAtomicSystemGroundTruth pins the exchange/compare-exchange/accumulate
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// family, the string primitives, the flag and system instructions, the MXCSR
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// pair, the scalar float-to-int conversions and the x87 FMOVD byte for byte
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// against go tool asm (see testdata/verify/atomics_amd64.s and
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// testdata/verify/system_amd64.s).
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func TestAtomicSystemGroundTruth(t *testing.T) {
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r8 := Reg{idx: 8, size: 8}
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cases := []struct {
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name string
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mnem string
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ops []Operand
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want string
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}{
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{"XCHGQ AX,BX", "XCHGQ", []Operand{AX, BX}, "4893"},
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{"XCHGQ BX,AX", "XCHGQ", []Operand{BX, AX}, "4893"},
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{"XCHGL AX,BX", "XCHGL", []Operand{AX, BX}, "93"},
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{"XCHGB AL,BL", "XCHGB", []Operand{AL, BL}, "86c3"},
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{"XCHGW AX,BX", "XCHGW", []Operand{AX, BX}, "6693"},
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{"XCHGQ R8,R9", "XCHGQ", []Operand{r8, Reg{idx: 9, size: 8}}, "4d87c1"},
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{"XCHGQ BX,(AX)", "XCHGQ", []Operand{BX, Ptr(AX, 0, 8)}, "488718"},
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{"XCHGQ (AX),BX", "XCHGQ", []Operand{Ptr(AX, 0, 8), BX}, "488718"},
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{"XCHGQ AX,(BX)", "XCHGQ", []Operand{AX, Ptr(BX, 0, 8)}, "488703"},
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{"CMPXCHGL AX,BX", "CMPXCHGL", []Operand{AX, BX}, "0fb1c3"},
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{"CMPXCHGQ AX,(BX)", "CMPXCHGQ", []Operand{AX, Ptr(BX, 0, 8)}, "480fb103"},
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{"CMPXCHGB AL,(BX)", "CMPXCHGB", []Operand{AL, Ptr(BX, 0, 1)}, "0fb003"},
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{"CMPXCHGW AX,BX", "CMPXCHGW", []Operand{AX, BX}, "660fb1c3"},
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{"XADDL AX,BX", "XADDL", []Operand{AX, BX}, "0fc1c3"},
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{"XADDQ AX,(BX)", "XADDQ", []Operand{AX, Ptr(BX, 0, 8)}, "480fc103"},
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{"XADDB AL,(BX)", "XADDB", []Operand{AL, Ptr(BX, 0, 1)}, "0fc003"},
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{"XADDW AX,BX", "XADDW", []Operand{AX, BX}, "660fc1c3"},
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{"ADCXL AX,CX", "ADCXL", []Operand{AX, CX}, "660f38f6c8"},
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{"ADCXQ AX,CX", "ADCXQ", []Operand{AX, CX}, "66480f38f6c8"},
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{"ADOXL AX,CX", "ADOXL", []Operand{AX, CX}, "f30f38f6c8"},
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{"ADOXQ AX,CX", "ADOXQ", []Operand{AX, CX}, "f3480f38f6c8"},
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{"CRC32B AX,CX", "CRC32B", []Operand{AX, CX}, "f20f38f0c8"},
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{"CRC32W AX,CX", "CRC32W", []Operand{AX, CX}, "66f20f38f1c8"},
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{"CRC32L AX,CX", "CRC32L", []Operand{AX, CX}, "f20f38f1c8"},
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{"CRC32Q AX,CX", "CRC32Q", []Operand{AX, CX}, "f2480f38f1c8"},
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{"CRC32L (AX),CX", "CRC32L", []Operand{Ptr(AX, 0, 4), CX}, "f20f38f108"},
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{"MOVSQ", "MOVSQ", []Operand{}, "48a5"},
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{"MOVSL", "MOVSL", []Operand{}, "a5"},
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{"MOVSB", "MOVSB", []Operand{}, "a4"},
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{"MOVSW", "MOVSW", []Operand{}, "66a5"},
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{"STOSB", "STOSB", []Operand{}, "aa"},
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{"STOSQ", "STOSQ", []Operand{}, "48ab"},
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{"STOSL", "STOSL", []Operand{}, "ab"},
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{"STOSW", "STOSW", []Operand{}, "66ab"},
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{"CLD", "CLD", []Operand{}, "fc"},
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{"STD", "STD", []Operand{}, "fd"},
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{"POPFQ", "POPFQ", []Operand{}, "9d"},
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{"PUSHFQ", "PUSHFQ", []Operand{}, "9c"},
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{"CPUID", "CPUID", []Operand{}, "0fa2"},
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{"RDTSC", "RDTSC", []Operand{}, "0f31"},
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{"RDTSCP", "RDTSCP", []Operand{}, "0f01f9"},
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{"SYSCALL", "SYSCALL", []Operand{}, "0f05"},
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{"XGETBV", "XGETBV", []Operand{}, "0f01d0"},
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{"PAUSE", "PAUSE", []Operand{}, "f390"},
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{"LFENCE", "LFENCE", []Operand{}, "0faee8"},
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{"MFENCE", "MFENCE", []Operand{}, "0faef0"},
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{"SFENCE", "SFENCE", []Operand{}, "0faef8"},
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{"UNDEF", "UNDEF", []Operand{}, "0f0b"},
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{"INT $3", "INT", []Operand{Imm(3)}, "cd03"},
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{"LDMXCSR (AX)", "LDMXCSR", []Operand{Ptr(AX, 0, 4)}, "0fae10"},
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{"STMXCSR (AX)", "STMXCSR", []Operand{Ptr(AX, 0, 4)}, "0fae18"},
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{"CVTSD2SL X0,AX", "CVTSD2SL", []Operand{vreg(t, "X0"), AX}, "f20f2dc0"},
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{"CVTTSD2SQ X0,AX", "CVTTSD2SQ", []Operand{vreg(t, "X0"), AX}, "f2480f2cc0"},
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{"CVTTSD2SL X0,AX", "CVTTSD2SL", []Operand{vreg(t, "X0"), AX}, "f20f2cc0"},
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{"CVTSS2SQ X0,AX", "CVTSS2SQ", []Operand{vreg(t, "X0"), AX}, "f3480f2dc0"},
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{"FMOVD (AX),F0", "FMOVD", []Operand{Ptr(AX, 0, 8), vreg(t, "F0")}, "dd00"},
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{"FMOVD F0,(AX)", "FMOVD", []Operand{vreg(t, "F0"), Ptr(AX, 0, 8)}, "dd10"},
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{"FMOVD F0,F1", "FMOVD", []Operand{vreg(t, "F0"), vreg(t, "F1")}, "ddd1"},
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{"MOVD AX,X0", "MOVD", []Operand{AX, vreg(t, "X0")}, "66480f6ec0"},
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{"MOVD X0,AX", "MOVD", []Operand{vreg(t, "X0"), AX}, "66480f7ec0"},
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{"MOVD X0,X1", "MOVD", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "f30f7ec8"},
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{"MOVD (AX),X0", "MOVD", []Operand{Ptr(AX, 0, 8), vreg(t, "X0")}, "f30f7e00"},
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{"MOVD X0,(AX)", "MOVD", []Operand{vreg(t, "X0"), Ptr(AX, 0, 8)}, "660fd600"},
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}
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for _, c := range cases {
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code, err := Encode(c.mnem, c.ops...)
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if err != nil {
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t.Errorf("%s: Encode: %v", c.name, err)
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continue
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}
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if got := fmt.Sprintf("%x", code); got != c.want {
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t.Errorf("%s = %s, want %s", c.name, got, c.want)
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}
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}
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// LDMXCSR/STMXCSR take a memory operand only.
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if _, err := Encode("LDMXCSR", AX); err == nil {
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t.Errorf("LDMXCSR AX: expected an error, got none")
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}
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}
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// TestSSEGapsGroundTruth pins the legacy SSE gap families: the scalar
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// compare and square root, the Plan 9 packed spellings, the imm8-controlled
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// shuffles, the lane extracts and inserts, the packed integer shifts and the
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// AES/SHA round instructions, byte for byte against go tool asm (see
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// testdata/verify/crypto_amd64.s and testdata/verify/sse_amd64.s).
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func TestSSEGapsGroundTruth(t *testing.T) {
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cases := []struct {
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name string
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mnem string
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ops []Operand
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want string
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}{
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{"ANDNPD X0,X1", "ANDNPD", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660f55c8"},
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{"ANDNPS X0,X1", "ANDNPS", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "0f55c8"},
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{"COMISD X0,X1", "COMISD", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660f2fc8"},
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{"SQRTSD X0,X1", "SQRTSD", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "f20f51c8"},
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{"PSHUFL $3,X0,X1", "PSHUFL", []Operand{Imm(3), vreg(t, "X0"), vreg(t, "X1")}, "660f70c803"},
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{"PALIGNR $2,X0,X1", "PALIGNR", []Operand{Imm(2), vreg(t, "X0"), vreg(t, "X1")}, "660f3a0fc802"},
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{"PBLENDW $3,X0,X1", "PBLENDW", []Operand{Imm(3), vreg(t, "X0"), vreg(t, "X1")}, "660f3a0ec803"},
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{"PCMPESTRI $1,X0,X1", "PCMPESTRI", []Operand{Imm(1), vreg(t, "X0"), vreg(t, "X1")}, "660f3a61c801"},
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{"PCLMULQDQ $0,X0,X1", "PCLMULQDQ", []Operand{Imm(0), vreg(t, "X0"), vreg(t, "X1")}, "660f3a44c800"},
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{"PCLMULQDQ $0,(AX),X1", "PCLMULQDQ", []Operand{Imm(0), Ptr(AX, 0, 16), vreg(t, "X1")}, "660f3a440800"},
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{"PEXTRB $1,X0,AX", "PEXTRB", []Operand{Imm(1), vreg(t, "X0"), AX}, "660f3a14c001"},
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{"PEXTRD $1,X0,AX", "PEXTRD", []Operand{Imm(1), vreg(t, "X0"), AX}, "660f3a16c001"},
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{"PEXTRQ $1,X0,AX", "PEXTRQ", []Operand{Imm(1), vreg(t, "X0"), AX}, "66480f3a16c001"},
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{"PEXTRW $1,X0,AX", "PEXTRW", []Operand{Imm(1), vreg(t, "X0"), AX}, "660fc5c001"},
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{"PEXTRW $1,X0,(AX)", "PEXTRW", []Operand{Imm(1), vreg(t, "X0"), Ptr(AX, 0, 2)}, "660f3a150001"},
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{"PINSRB $1,AX,X0", "PINSRB", []Operand{Imm(1), AX, vreg(t, "X0")}, "660f3a20c001"},
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{"PINSRD $1,AX,X0", "PINSRD", []Operand{Imm(1), AX, vreg(t, "X0")}, "660f3a22c001"},
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{"PINSRQ $1,AX,X0", "PINSRQ", []Operand{Imm(1), AX, vreg(t, "X0")}, "66480f3a22c001"},
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{"PINSRW $1,AX,X0", "PINSRW", []Operand{Imm(1), AX, vreg(t, "X0")}, "660fc4c001"},
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{"PINSRW $1,(AX),X0", "PINSRW", []Operand{Imm(1), Ptr(AX, 0, 2), vreg(t, "X0")}, "660fc40001"},
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{"PSLLL $2,X0", "PSLLL", []Operand{Imm(2), vreg(t, "X0")}, "660f72f002"},
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{"PSRAL $2,X0", "PSRAL", []Operand{Imm(2), vreg(t, "X0")}, "660f72e002"},
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{"PSRLL $2,X0", "PSRLL", []Operand{Imm(2), vreg(t, "X0")}, "660f72d002"},
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{"PSRLQ $2,X0", "PSRLQ", []Operand{Imm(2), vreg(t, "X0")}, "660f73d002"},
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{"PSLLQ $2,X0", "PSLLQ", []Operand{Imm(2), vreg(t, "X0")}, "660f73f002"},
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{"PSLLW $2,X0", "PSLLW", []Operand{Imm(2), vreg(t, "X0")}, "660f71f002"},
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{"PSRLW $2,X0", "PSRLW", []Operand{Imm(2), vreg(t, "X0")}, "660f71d002"},
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{"PSRAW $2,X0", "PSRAW", []Operand{Imm(2), vreg(t, "X0")}, "660f71e002"},
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{"PSLLDQ $2,X0", "PSLLDQ", []Operand{Imm(2), vreg(t, "X0")}, "660f73f802"},
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{"PSRLDQ $2,X0", "PSRLDQ", []Operand{Imm(2), vreg(t, "X0")}, "660f73d802"},
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{"PSLLL X0,X1", "PSLLL", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660ff2c8"},
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{"PSRLQ X0,X1", "PSRLQ", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660fd3c8"},
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{"PSLLL (AX),X1", "PSLLL", []Operand{Ptr(AX, 0, 16), vreg(t, "X1")}, "660ff208"},
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{"PSUBL X0,X1", "PSUBL", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660ffac8"},
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{"PADDL X0,X1", "PADDL", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660ffec8"},
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{"PCMPEQL X0,X1", "PCMPEQL", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660f76c8"},
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{"PUNPCKLBW X0,X1", "PUNPCKLBW", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660f60c8"},
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{"MOVOA X0,X1", "MOVOA", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660f6fc8"},
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{"MOVOA (AX),X1", "MOVOA", []Operand{Ptr(AX, 0, 16), vreg(t, "X1")}, "660f6f08"},
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{"MOVOA X0,(AX)", "MOVOA", []Operand{vreg(t, "X0"), Ptr(AX, 0, 16)}, "660f7f00"},
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{"AESIMC X0,X1", "AESIMC", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660f38dbc8"},
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{"AESIMC (AX),X1", "AESIMC", []Operand{Ptr(AX, 0, 16), vreg(t, "X1")}, "660f38db08"},
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{"AESENC X0,X1", "AESENC", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660f38dcc8"},
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{"AESENCLAST X0,X1", "AESENCLAST", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660f38ddc8"},
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{"AESDEC X0,X1", "AESDEC", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660f38dec8"},
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{"AESDECLAST X0,X1", "AESDECLAST", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "660f38dfc8"},
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{"AESKEYGENASSIST $0,X0,X1", "AESKEYGENASSIST", []Operand{Imm(0), vreg(t, "X0"), vreg(t, "X1")}, "660f3adfc800"},
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{"SHA1MSG1 X0,X1", "SHA1MSG1", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "0f38c9c8"},
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{"SHA1MSG2 X0,X1", "SHA1MSG2", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "0f38cac8"},
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{"SHA1NEXTE X0,X1", "SHA1NEXTE", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "0f38c8c8"},
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{"SHA1RNDS4 $0,X0,X1", "SHA1RNDS4", []Operand{Imm(0), vreg(t, "X0"), vreg(t, "X1")}, "0f3accc800"},
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{"SHA256MSG1 X0,X1", "SHA256MSG1", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "0f38ccc8"},
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{"SHA256MSG2 X0,X1", "SHA256MSG2", []Operand{vreg(t, "X0"), vreg(t, "X1")}, "0f38cdc8"},
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{"SHA256RNDS2 X0,X1,X2", "SHA256RNDS2", []Operand{vreg(t, "X0"), vreg(t, "X1"), vreg(t, "X2")}, "0f38cbd1"},
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}
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for _, c := range cases {
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code, err := Encode(c.mnem, c.ops...)
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if err != nil {
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t.Errorf("%s: Encode: %v", c.name, err)
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continue
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}
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if got := fmt.Sprintf("%x", code); got != c.want {
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t.Errorf("%s = %s, want %s", c.name, got, c.want)
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}
|
||||
}
|
||||
// SHA256RNDS2's first operand must be the literal X0.
|
||||
if _, err := Encode("SHA256RNDS2", vreg(t, "X1"), vreg(t, "X2"), vreg(t, "X3")); err == nil {
|
||||
t.Errorf("SHA256RNDS2 X1,...: expected an error, got none")
|
||||
}
|
||||
// PSLLDQ has no variable-count form.
|
||||
if _, err := Encode("PSLLDQ", vreg(t, "X0"), vreg(t, "X1")); err == nil {
|
||||
t.Errorf("PSLLDQ X0,X1: expected an error, got none")
|
||||
}
|
||||
}
|
||||
|
||||
// TestSSEBinGroundTruth checks the legacy packed/scalar binary family
|
||||
// byte for byte (no prefix / 66 / F2 / F3 variants).
|
||||
func TestSSEBinGroundTruth(t *testing.T) {
|
||||
|
||||
Reference in New Issue
Block a user