feat(amd64): encode the GOROOT instruction families
Assisted-by: GLM 5.3 Flash
This commit is contained in:
Vendored
+57
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// The AES-NI, SHA and carry-less multiply round instructions as GOROOT's
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// crypto kernels spell them. Every result is folded back so no instruction
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// is dead.
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#include "textflag.h"
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// func aesround(blk, rk *byte)
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TEXT ·aesround(SB), NOSPLIT, $0-16
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MOVQ blk+0(FP), SI
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MOVQ rk+8(FP), DI
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MOVOU (SI), X0
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MOVOU (DI), X1
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AESENC X1, X0
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AESENCLAST X1, X0
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AESDEC X1, X0
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AESDECLAST X1, X0
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AESIMC X1, X2
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AESKEYGENASSIST $1, X1, X3
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MOVOU X0, (SI)
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MOVOU X2, (DI)
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RET
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// func sha1block(p *byte, n int, h *[5]uint32)
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TEXT ·sha1block(SB), NOSPLIT, $0-24
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MOVQ p+0(FP), SI
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MOVQ h+16(FP), DI
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MOVOU (SI), X0
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MOVOU 16(SI), X1
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SHA1RNDS4 $0, X1, X0
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SHA1NEXTE X1, X0
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SHA1MSG1 X1, X2
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SHA1MSG2 X1, X2
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MOVOU X0, (DI)
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RET
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// func sha256block(p *byte, n int, h *[8]uint32)
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TEXT ·sha256block(SB), NOSPLIT, $0-24
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MOVQ p+0(FP), SI
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MOVQ h+16(FP), DI
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MOVOU (SI), X0
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MOVOU 16(SI), X1
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SHA256RNDS2 X0, X1, X0
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SHA256MSG1 X1, X2
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SHA256MSG2 X1, X2
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MOVOU X0, (DI)
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RET
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// func pclmul(a, b *byte)
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TEXT ·pclmul(SB), NOSPLIT, $0-16
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MOVQ a+0(FP), SI
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MOVQ b+8(FP), DI
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MOVOU (SI), X0
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MOVOU (DI), X1
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PCLMULQDQ $0, X1, X0
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PCLMULQDQ $17, (DI), X0
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MOVOU X0, (SI)
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RET
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