feat(amd64): encode the GOROOT instruction families

Assisted-by: GLM 5.3 Flash
2026-09-20 06:44:51 +02:00
parent 39d2e80145
commit fc2d92eabd
16 changed files with 1709 additions and 43 deletions
@@ -0,0 +1,77 @@
+// The legacy SSE gap families: scalar compares and square roots, the Plan 9
+// packed spellings, shuffles, lane extracts and inserts, packed integer
+// shifts and the octa moves.  Every result is folded back so no instruction
+// is dead.
+
+#include "textflag.h"
+
+// func cmporder(a, b *float64) int
+TEXT ·cmporder(SB), NOSPLIT, $0-24
+	MOVQ   a+0(FP), SI
+	MOVQ   b+8(FP), DI
+	MOVSD  (SI), X0
+	MOVSD  (DI), X1
+	ANDNPD X0, X2
+	ANDNPS X0, X3
+	COMISD X0, X1
+	SQRTSD X0, X2
+	CMPSD  X0, X1, $5
+	MOVL   SI, CX
+	SETPL  CL
+	MOVL   CX, ret+16(FP)
+	RET
+
+// func packed(w *uint64) uint64
+TEXT ·packed(SB), NOSPLIT, $0-16
+	MOVQ      w+0(FP), SI
+	MOVO      (SI), X0
+	MOVOA     (SI), X1
+	PADDL     X0, X1
+	PSUBL     X0, X1
+	PCMPEQL   X0, X1
+	PUNPCKLBW X0, X1
+	PSHUFL    $27, X0, X2
+	MOVOU     X2, (SI)
+	MOVQ      (SI), AX
+	MOVQ      AX, ret+8(FP)
+	RET
+
+// func lanes(p *byte, buf *byte)
+TEXT ·lanes(SB), NOSPLIT, $0-16
+	MOVQ      p+0(FP), SI
+	MOVQ      buf+8(FP), DI
+	MOVO      (SI), X0
+	MOVQ      SI, AX
+	PINSRB    $1, AX, X0
+	PINSRW    $2, AX, X0
+	PINSRD    $3, AX, X0
+	PINSRQ    $1, AX, X0
+	PEXTRB    $1, X0, AX
+	PEXTRW    $2, X0, AX
+	PEXTRD    $3, X0, AX
+	PEXTRQ    $1, X0, CX
+	PCMPESTRI $4, X0, X0
+	MOVB      AL, (DI)
+	MOVOU     X0, (SI)
+	RET
+
+// func shifts(p *uint64)
+TEXT ·shifts(SB), NOSPLIT, $0-8
+	MOVQ   p+0(FP), SI
+	MOVO   (SI), X0
+	MOVO   X0, X1
+	PSLLW  $3, X0
+	PSRLW  $1, X1
+	PSRAW  $2, X0
+	PSLLL  $4, X0
+	PSRLL  $5, X1
+	PSRAL  $1, X0
+	PSLLQ  $7, X0
+	PSRLQ  $9, X1
+	PSLLL  X1, X0
+	PSRLQ  X0, X1
+	PSLLDQ $2, X0
+	PSRLDQ $4, X1
+	MOVOU  X0, (SI)
+	MOVOU  X1, 16(SI)
+	RET