13 Commits

Include renames

Author	SHA1	Message	Date
petrbalvin	924e0013eb	feat(riscv64,loong64): encode AMO atomics, vector slices and bit ops ... Assisted-by: DeepSeek V4.1 Flash	2026-09-20 06:44:51 +02:00
petrbalvin	79a2c16bac	fix(riscv64): compressed store offsets, FENCE and branch range checks ... Assisted-by: GLM 5.3	2026-09-19 23:49:13 +02:00
petrbalvin	23c001be51	feat(asm): encode indirect JMP and CALL on all four architectures ... Assisted-by: GLM 5.3 Flash	2026-09-19 19:17:07 +02:00
petrbalvin	0078f7be5c	style: purge em dashes from the produced text ... Assisted-by: GLM 5.3 Flash	2026-09-16 23:12:31 +02:00
petrbalvin	c05c53452f	fix(asm): encode RISC-V CALL sym(SB) as JAL ... Assisted-by: DeepSeek V4 Pro	2026-08-13 18:12:22 +02:00
petrbalvin	681a449c01	fix(asm): match RISC-V branch and jump encodings	2026-08-13 17:57:10 +02:00
petrbalvin	31a2cee382	fix(asm): materialise RISC-V MOV immediates	2026-08-13 17:41:16 +02:00
petrbalvin	f0512a4e1c	fix(asm): complete RISC-V compressed loads/stores and word arithmetic ... Assisted-by: DeepSeek V4 Pro	2026-08-13 15:42:38 +02:00
petrbalvin	373c09f725	fix(asm): correct RISC-V operand order and complete RVC compression ... Assisted-by: DeepSeek V4 Pro	2026-08-13 15:13:31 +02:00
petrbalvin	b78b6c5004	fix(asm): correct RISC-V frame layout and RVC encodings ... Assisted-by: GLM 5.2	2026-08-13 14:41:57 +02:00
petrbalvin	f41a86b660	feat(asm): add RISC-V ELF relocatable object emission and SB relocation ... support	2026-08-03 08:51:00 +02:00
petrbalvin	7721353d44	feat(asm): add RVC compression for branches, arithmetic, and FP ... Assisted-by: DeepSeek V4 Pro	2026-08-03 01:08:00 +02:00
petrbalvin	243b087116	feat(riscv): add MOV pseudo-instruction and RVC compressed encoding ... Assisted-by: DeepSeek V4 Pro	2026-08-02 18:22:00 +02:00