petrbalvin
4066396226
feat(asm): encode the GETCALLERPC, REM, DWORD and half-FCVT shapes
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Assisted-by: GLM 5.3 Flash
2026-10-07 21:34:30 +02:00
petrbalvin
8ab99c9b0c
fix(asm): tighten the arm64 acceptance toward the toolchain
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Assisted-by: GLM 5.3 Flash
2026-10-07 02:36:24 +02:00
petrbalvin
9ef14bdb71
feat(asm): encode the arm64 SIMD arrangement bits
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Assisted-by: GLM 5.3 Flash
2026-10-07 02:36:24 +02:00
petrbalvin
a344399b81
fix(asm): set the CASALH opcode bit fifteen
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The CASALH entry carried the CASB/CASH opcode pattern where the acquire
forms take the full fixed field, so the word differed from the
toolchain's in one opcode bit. Pinned against the oracle word.
Assisted-by: GLM 5.3 Flash
2026-10-07 02:36:24 +02:00
petrbalvin
daf7fad5b9
feat(asm): encode the arm64 Q-width FP load and store
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FMOVQ routes through the MOV load/store machinery in the plain, post-index,
pre-index and static-symbol forms. The Q width carries its size in the opc
field, so the store spelling is opc=10 and the access scales by sixteen;
both come from helpers now instead of the size exponent. The static-symbol
form takes the toolchain's twelve-byte ADRP + ADD + access fallback with the
R_ADDRARM64 pair. The register-to-register and immediate forms stay
rejected, matching the toolchain's own table.
Assisted-by: GLM 5.3 Flash
2026-10-07 02:36:24 +02:00
petrbalvin
a6bd9c1ebe
feat(asm): encode the LDEORAL acquire variants
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Assisted-by: GLM 5.3 Flash
2026-10-07 02:36:24 +02:00
petrbalvin
2747fce7d3
feat(asm): encode the arm64 system registers and structure loads
2026-10-02 20:39:26 +02:00
petrbalvin
4d01bb3ecf
build: rename the module to sourcedock.dev/petrbalvin/gasm-sdk
Test / test (push) Successful in 4m18s
2026-09-26 11:08:43 +02:00
petrbalvin
b0f9071bf5
feat(arm64): whole-vector moves, bookkeeping ops and truncating-move lowering
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Assisted-by: GLM 5.3 Flash
2026-09-20 21:17:20 +02:00
petrbalvin
9b238a525a
feat(arm64): wide immediates, SIMD compare and system operand forms
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Assisted-by: GLM 5.3 Flash
2026-09-20 14:25:47 +02:00
petrbalvin
0629f5e2df
feat(arm64): assemble PCALIGN padding and BYTE literal bytes
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Test / test (push) Successful in 2m16s
Assisted-by: GLM 5.3 Flash
2026-09-20 11:49:05 +02:00
petrbalvin
ca3fdce0e0
feat(arm64): encode pairs, atomics, crypto, system and NEON slices
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Assisted-by: GLM 5.3 Flash
2026-09-20 06:44:51 +02:00
petrbalvin
d315a998ce
fix(arm64): store-exclusive operand order and large-frame parity
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Assisted-by: GLM 5.3
2026-09-20 00:38:24 +02:00
petrbalvin
401386956c
fix(arm64): encode shifts, divides and multiplies and align sizes with emission
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Assisted-by: GLM 5.3
2026-09-19 23:49:07 +02:00
petrbalvin
1691c81095
style: replace em and en dashes across sources
2026-09-14 18:22:18 +02:00
petrbalvin
56ad158772
fix: restore iota blocks, asm --format flag and prose after the syntax pass
Test / vet (push) Successful in 48s
Test / test (push) Successful in 2m35s
Test / build (push) Successful in 40s
2026-08-29 17:12:53 +02:00
petrbalvin
eacf33d0f7
fix: staticcheck and deadcode findings repo-wide, modernize counting loops
2026-08-29 15:25:15 +02:00
petrbalvin
97951cbeb6
feat(asm): extend arm64 encoder with atomics, bitfield, SIMD and more test kernels
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Assisted-by: MiMo V2.5 Pro
2026-08-20 14:31:15 +02:00
petrbalvin
6e73f59e78
feat(asm): extend arm64 encoder with FP, conditional select, CRC32 and tests
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Assisted-by: MiMo V2.5 Pro
2026-08-20 14:07:12 +02:00
petrbalvin
4221ec5741
feat(asm): add AArch64 arm64 encoder with ground-truth verification
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Assisted-by: MiMo V2.5 Pro
2026-08-20 13:33:39 +02:00