 petrbalvin
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e3b35bb817
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style(testdata): canonical gasm formatting for the verify kernels
Assisted-by: GLM 5.3
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2026-09-19 23:49:27 +02:00 |
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petrbalvin
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ebdf14939f
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fix(loong64): FP immediates through R30 and unsigned branch forms
Assisted-by: GLM 5.3
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2026-09-19 23:49:13 +02:00 |
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petrbalvin
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79a2c16bac
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fix(riscv64): compressed store offsets, FENCE and branch range checks
Assisted-by: GLM 5.3
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2026-09-19 23:49:13 +02:00 |
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petrbalvin
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401386956c
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fix(arm64): encode shifts, divides and multiplies and align sizes with emission
Assisted-by: GLM 5.3
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2026-09-19 23:49:07 +02:00 |
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petrbalvin
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f37f183577
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feat(riscv64): GOROOT instruction shapes, DATA order and offset expressions
Assisted-by: GLM 5.3 Flash
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2026-09-19 19:58:43 +02:00 |
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petrbalvin
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23c001be51
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feat(asm): encode indirect JMP and CALL on all four architectures
Assisted-by: GLM 5.3 Flash
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2026-09-19 19:17:07 +02:00 |
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petrbalvin
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03d6d4da54
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style: put the repository assembly in gasm fmt canonical form
Assisted-by: GLM 5.3 Flash
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2026-09-17 20:33:18 +02:00 |
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petrbalvin
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0078f7be5c
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style: purge em dashes from the produced text
Assisted-by: GLM 5.3 Flash
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2026-09-16 23:12:31 +02:00 |
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petrbalvin
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40476546df
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fix(asm): close the oracle parity gaps in frame addressing and calls
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2026-09-14 23:25:14 +02:00 |
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petrbalvin
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8f84dac10b
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feat(verify): ABI checks on arm64, riscv64 and loong64
Assisted-by: GLM 5.3 Flash
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2026-08-30 11:27:54 +02:00 |
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petrbalvin
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d75e6bcae6
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feat(lint): abi0 register-args rule and go-asm width model
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2026-08-29 13:36:28 +02:00 |
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petrbalvin
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97951cbeb6
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feat(asm): extend arm64 encoder with atomics, bitfield, SIMD and more test kernels
Assisted-by: MiMo V2.5 Pro
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2026-08-20 14:31:15 +02:00 |
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petrbalvin
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6e73f59e78
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feat(asm): extend arm64 encoder with FP, conditional select, CRC32 and tests
Assisted-by: MiMo V2.5 Pro
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2026-08-20 14:07:12 +02:00 |
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petrbalvin
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4221ec5741
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feat(asm): add AArch64 arm64 encoder with ground-truth verification
Assisted-by: MiMo V2.5 Pro
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2026-08-20 13:33:39 +02:00 |
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petrbalvin
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c05c53452f
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fix(asm): encode RISC-V CALL sym(SB) as JAL
Test / vet (push) Successful in 47s
Test / test (push) Failing after 2m9s
Test / build (push) Skipped
Assisted-by: DeepSeek V4 Pro
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2026-08-13 18:12:22 +02:00 |
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petrbalvin
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681a449c01
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fix(asm): match RISC-V branch and jump encodings
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2026-08-13 17:57:10 +02:00 |
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petrbalvin
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31a2cee382
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fix(asm): materialise RISC-V MOV immediates
Test / vet (push) Successful in 44s
Test / test (push) Failing after 1m56s
Test / build (push) Skipped
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2026-08-13 17:41:16 +02:00 |
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petrbalvin
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3bc7c18bc3
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fix(asm): materialise large RISC-V immediates
Assisted-by: DeepSeek V4 Pro
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2026-08-13 16:04:08 +02:00 |
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petrbalvin
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f0512a4e1c
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fix(asm): complete RISC-V compressed loads/stores and word arithmetic
Assisted-by: DeepSeek V4 Pro
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2026-08-13 15:42:38 +02:00 |
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petrbalvin
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373c09f725
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fix(asm): correct RISC-V operand order and complete RVC compression
Assisted-by: DeepSeek V4 Pro
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2026-08-13 15:13:31 +02:00 |
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petrbalvin
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b78b6c5004
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fix(asm): correct RISC-V frame layout and RVC encodings
Assisted-by: GLM 5.2
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2026-08-13 14:41:57 +02:00 |
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petrbalvin
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31ee8e7941
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feat(asm): add LoongArch encoder with ELF and GOOBJ emission
Assisted-by: DeepSeek V4 Pro
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2026-08-13 11:24:44 +02:00 |
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petrbalvin
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243b087116
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feat(riscv): add MOV pseudo-instruction and RVC compressed encoding
Assisted-by: DeepSeek V4 Pro
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2026-08-02 18:22:00 +02:00 |
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petrbalvin
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eee7a6d4a4
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feat(riscv): add RISC-V RV64A, FP and CSR instruction support
Assisted-by: Kimi K3
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2026-08-02 11:45:00 +02:00 |
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petrbalvin
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a2acc9b5a3
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feat(riscv): add prologue, epilogue and frame pseudo-register support
Assisted-by: Kimi K3
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2026-08-02 00:18:00 +02:00 |
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petrbalvin
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f5088c52fc
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feat(verify): add runtime ABI checks with sentinel registers and red-zone canary
Assisted-by: Qwen 3.8 Max Preview
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2026-08-02 23:11:30 +02:00 |
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petrbalvin
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c9775c2b95
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feat(verify): add the JIT execution substrate and gasm verify subcommand
Assisted-by: Qwen 3.8 Max Preview
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2026-08-02 23:11:30 +02:00 |
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petrbalvin
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d5a4a6de45
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feat: gasm-devkit 0.1.0 — GAsm lexer, parser, linter, formatter, LSP and amd64 assembler
Assisted-by: Qwen 3.8 Max Preview
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2026-07-06 09:49:50 +02:00 |
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