18 Commits

Include renames

Author	SHA1	Message	Date
petrbalvin	ee2c6d51b3	fix(arch): keep Zdn out of the class bits of the predicated Z-alias source ... Assisted-by: GLM 5.3 Flash	2026-10-07 20:35:41 +02:00
petrbalvin	96000dd64d	feat(arch): add the VEX encoder to the extension layer ... Assisted-by: GLM 5.3 Flash	2026-10-07 19:49:15 +02:00
petrbalvin	d03de62c07	feat(arch): add the amd64 fp16 packed imm8-control group ... Assisted-by: GLM 5.3	2026-10-07 13:51:48 +02:00
petrbalvin	8de1b371da	feat(arch): add the amd64 fp16 packed conversion family ... Assisted-by: GLM 5.3	2026-10-07 13:51:48 +02:00
petrbalvin	fb6d01a7d0	feat(arch): encode the amd64 embedded rounding and SAE decorations ... Assisted-by: GLM 5.3	2026-10-07 13:51:48 +02:00
petrbalvin	e56c04e9ee	fix(asm): read three operands from the arm64 last-element form ... Assisted-by: GLM 5.3	2026-10-07 13:51:10 +02:00
petrbalvin	104bea036b	feat(asm): encode the arm64 SVE gather loads and scatter stores ... Assisted-by: GLM 5.3	2026-10-07 13:51:10 +02:00
petrbalvin	6faf850793	feat(asm): encode the arm64 SVE2 crypto, counter and reduction families ... Assisted-by: GLM 5.3	2026-10-07 13:51:10 +02:00
petrbalvin	6c4932c4ec	feat(arch): the SVE2.1 Z-alias permutations and copies ... Assisted-by: GLM 5.3 Flash	2026-10-07 02:27:35 +02:00
petrbalvin	8231302bca	feat(arch): the SVE predicate family in the extended layer ... Assisted-by: GLM 5.3 Flash	2026-10-07 02:26:19 +02:00
petrbalvin	c2adde948f	feat(arch): add the write mask to the packed amd64 destinations ... Assisted-by: GLM 5.3 Flash	2026-10-07 02:21:57 +02:00
petrbalvin	11cac26508	feat(arch): add the scaled index to the amd64 memory operands ... Assisted-by: GLM 5.3 Flash	2026-10-07 02:06:11 +02:00
petrbalvin	ccb155437e	feat(arch): add the {1toN} broadcast to the packed amd64 memory sources ... Assisted-by: GLM 5.3 Flash	2026-10-07 02:06:11 +02:00
petrbalvin	7d69dda874	feat(arch): add the amd64 memory-operand mechanism to the extension layer ... Assisted-by: GLM 5.3 Flash	2026-10-07 01:35:48 +02:00
petrbalvin	aa9c7ca030	feat(arch): add the imm8 scalar FP16 controls to the amd64 extension layer ... Assisted-by: GLM 5.3 Flash	2026-10-07 00:33:30 +02:00
petrbalvin	bc37ea5b79	feat(arch): add the AVX512-FP16 scalar family to the amd64 extension layer ... Assisted-by: GLM 5.3 Flash	2026-10-07 00:07:58 +02:00
petrbalvin	28bea95128	feat(arch): add the amd64 extended-instruction layer with BF16 and VP2INTERSECT ... Assisted-by: GLM 5.3 Flash	2026-10-07 00:07:58 +02:00
petrbalvin	5a8e9acbf3	feat(arch): add the extended-instruction layer with SVE arithmetic	2026-10-02 20:39:33 +02:00