54 lines
1.3 KiB
ArmAsm
54 lines
1.3 KiB
ArmAsm
// Copyright (c) 2026 Petr Balvín <opensource@petrbalvin.org> (https://petrbalvin.org)
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// SPDX-License-Identifier: BSD-3-Clause
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// Differential kernel for the riscv64 RVV slice: the instructions GOROOT's
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// vector kernels use (crypto/internal/fips140/subtle/xor_riscv64.s,
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// internal/bytealg and internal/chacha8rand), spelled as they spell them.
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#include "textflag.h"
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TEXT ·config(SB), NOSPLIT, $0-0
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VSETVLI X5, E8, M8, TA, MA, X6
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VSETVLI X11, E8, M8, TA, MA, X5
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VSETVLI X12, E8, M8, TA, MA, X5
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VSETVLI X13, E8, M8, TU, MU, X15
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VSETIVLI $4, E32, M1, TA, MA, X0
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VSETIVLI $15, E32, M1, TA, MA, X12
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VSETVLI $15, E32, M1, TA, MA, X12
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VSETVLI X10, E16, M1, TU, MU, X12
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VSETVLI X10, E32, M2, TA, MA, X12
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VSETVLI X10, E64, M8, TU, MU, X12
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VSETIVLI $31, E32, M1, TA, MA, X12
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RET
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TEXT ·loadsStores(SB), NOSPLIT, $0-0
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VLE8V (X10), V8
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VLE8V (X11), V16
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VLE8V (X12), V16
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VIDV V12
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VMV4RV V8, V24
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VSE8V V24, (X10)
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VSE32V V0, (X11)
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VSE32V V8, (X11)
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VSE32V V15, (X11)
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RET
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TEXT ·segmented(SB), NOSPLIT, $0-0
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VLSSEG4E32V (X14), X0, V0
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VLSSEG8E32V (X10), X0, V4
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RET
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TEXT ·crypto(SB), NOSPLIT, $0-0
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VADDVV V20, V4, V4
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VADDVV V27, V11, V11
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VADDVX X12, V12, V12
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VXORVV V8, V16, V24
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VXORVV V13, V13, V13
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VMSEQVX X12, V8, V0
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VMSNEVV V8, V16, V0
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VFIRSTM V0, X6
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VFIRSTM V0, X7
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VSLLVI $8, V28, V30
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VSRLVI $25, V29, V29
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RET
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