petrbalvin eee7a6d4a4 feat(riscv): add RISC-V RV64A, FP and CSR instruction support ...

Assisted-by: Kimi K3

2026-08-02 11:45:00 +02:00

..

assemble_test.go

feat(asm): byte-identical go-flac AVX2 assembly with scalar families and jump relaxation

2026-07-08 12:51:35 +02:00

assemble.go

feat(debug): complete the interactive debugger with disassembly, breakpoints, watchpoints and execution control

2026-08-01 09:47:00 +02:00

elf_test.go

feat(asm): emit linkable ELF and Mach-O objects with external symbols

2026-07-16 20:52:20 +02:00

elf.go

feat(asm): emit linkable ELF and Mach-O objects with external symbols

2026-07-16 20:52:20 +02:00

encode_test.go

fix(lint): calibrate register-clobber to the Go ABI and add legacy SSE moves

2026-07-11 17:36:52 +02:00

encode.go

feat(asm): add the EVEX FP helper tail and gather/scatter with VSIB

2026-07-19 15:58:48 +02:00

evex_test.go

feat(asm): add the GPR-interchanging conversions, completing the amd64 EVEX set

2026-08-02 23:11:30 +02:00

evex.go

feat(asm): add the GPR-interchanging conversions, completing the amd64 EVEX set

2026-08-02 23:11:30 +02:00

goobj_test.go

feat(asm): emit GOOBJ objects that link directly with the Go toolchain

2026-07-17 18:57:04 +02:00

goobj.go

feat(asm): emit GOOBJ objects that link directly with the Go toolchain

2026-07-17 18:57:04 +02:00

instrs.go

fix(lint): calibrate register-clobber to the Go ABI and add legacy SSE moves

2026-07-11 17:36:52 +02:00

link_test.go

feat(asm): assemble static symbols and the whole go-flac AVX2 kernel byte-identically

2026-07-09 15:56:03 +02:00

link.go

feat(riscv): add prologue, epilogue and frame pseudo-register support

2026-08-02 00:18:00 +02:00

macho_test.go

feat(asm): emit linkable ELF and Mach-O objects with external symbols

2026-07-16 20:52:20 +02:00

macho.go

feat(asm): emit linkable ELF and Mach-O objects with external symbols

2026-07-16 20:52:20 +02:00

operand.go

feat(asm): assemble static symbols and the whole go-flac AVX2 kernel byte-identically

2026-07-09 15:56:03 +02:00

reg.go

feat(asm): add EVEX/AVX-512 encoding and assemble the AVX-512 kernel byte-identically

2026-07-10 13:20:49 +02:00

riscv_assemble.go

feat(riscv): add RISC-V RV64A, FP and CSR instruction support

2026-08-02 11:45:00 +02:00

riscv_encode.go

feat(riscv): add RISC-V RV64A, FP and CSR instruction support

2026-08-02 11:45:00 +02:00

riscv_frame.go

feat(riscv): add prologue, epilogue and frame pseudo-register support

2026-08-02 00:18:00 +02:00

vex_test.go

feat(asm): add the GPR-interchanging conversions, completing the amd64 EVEX set

2026-08-02 23:11:30 +02:00

vex.go

feat(asm): add the GPR-interchanging conversions, completing the amd64 EVEX set

2026-08-02 23:11:30 +02:00