feat(arch): the SVE2 three-source and bitwise combine families

Assisted-by: GLM 5.3 Flash

asm/extension_test.go

@@ -304,6 +304,17 @@ func TestExtensionNamesARM64(t *testing.T) {
 		"ZLSLR",
 		"ZLSR",
 		"ZLSRR",
+		"ZBCAX",
+		"ZBDEP",
+		"ZBEXT",
+		"ZBGRP",
+		"ZBSL",
+		"ZBSL1N",
+		"ZBSL2N",
+		"ZEOR3",
+		"ZEORBT",
+		"ZEORTB",
+		"ZNBSL",
 		// The stage-three families: the SVE2 crypto group, the predicate
 		// counters and loop terminators with the 32-bit while compares, and
 		// the reductions into a SIMD register.
@@ -416,7 +427,7 @@ func TestExtensionNamesARM64(t *testing.T) {
 	if strings.Join(got, ",") != strings.Join(want, ",") {
 		t.Errorf("ExtensionNames(ARM64) = %v, want %v", got, want)
 	}
-	if n := len(arch.Extensions(arch.ARM64)); n != 414 {
-		t.Errorf("the family registers %d instructions, want 414", n)
+	if n := len(arch.Extensions(arch.ARM64)); n != 425 {
+		t.Errorf("the family registers %d instructions, want 425", n)
 	}
 }