fix(cmd/gasm): probe the riscv64 operand shapes the encoder accepts

Assisted-by: GLM 5.3 Flash
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petrbalvin committed 2026-10-07 19:40:32 +02:00
1 parent d18195f581
commit 4ff47fe17a
1 file changed
+37 -2
+37 -2
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@@ -305,22 +305,57 @@ func probeShapes(a arch.Arch) []string {
"(X5), X6", "F0, F1, F2", "F0, F1", "p2", "X1, p2", "X0, p2",
"X5, X6, p2", "p2(SB)",
// AMO atomics: destination, base, source.
"R5, (R4), R6", "X5, (X4), X6",
"R5, (R4), R6", "X5, (R4), R6", "X5, (X4), X6",
// Segment stores take the first vector register aligned
// to the segment count, as the toolchain requires.
"(X5), X6, V0, V8", "(X5), X6, V0", "(X5), X0, V4",
// The FP multiply-add family takes four registers.
"F0, F1, F2, F3",
// The register banks the conversions and comparisons read:
// FCLASS and the float-to-int moves end in an integer
// register, the int-to-float forms open with one, and the
// FP compares write their verdict into the integer file.
"F0, X5", "X5, F0", "F0, F1, X5",
// The RVV slice: register, vector-register and vtype forms.
"V1, V2, V3", "V1, X5, V2", "V1", "V1, (X5)", "(X5), V1",
"$15, V1", "$15", "V1, V2", "V1, X5",
"X5, X6, p2", "R5, R6, p2",
"X5, E8, M8, TA, MA, X6", "$4, E32, M1, TA, MA, X1",
"(X5), X6, V1, V2",
// The vector scalar forms: the float scalar in the rs1
// field (VFADDVF and the whole VF family, VFMVVF), the
// integer scalar spellings (VMVVX, VMVXS, VCPOPM) and the
// masked four-operand shapes.
"F1, V2, V3", "V1, F2, V3", "F1, V2", "V1, F2",
"X1, V2", "V1, X2",
"F1, V2, V0, V3", "V1, F2, V0, V3", "V2, F1, V0, V3",
// The indexed vector loads and stores name a vector index
// register, the strided ones an integer stride.
"(X5), V2, V1", "V1, V2, (X5)", "V1, X6, (X5)",
// The CSR immediate forms the toolchain's testdata spells:
// immediate, CSR name, destination.
"$2, TIME, X5",
"",
// The vector carry and merge forms carry the mandatory V0
// mask between the sources and the destination; the
// carry-producing ones take the mask-free three-operand
// shape, and CANDI's immediate form lands on a prime
// register.
"V1, V2, V0, V3", "X5, V2, V0, V3", "$15, V2, V0, V3",
"$15, V2, V3", "X5, V2, V3", "$-32, X10",
// The runtime's bookkeeping pair, the compiler's own
// no-operand statements.
"$1, $0", "",
// The compressed instructions the toolchain's own testdata
// spells: the stack-based loads and stores pin their base to
// SP, the register-based ones live in the prime registers
// X8-X15, and the control forms branch PC-relatively.
"20(SP), X10", "24(SP), X10", "32(SP), F10",
"X10, 20(SP)", "X10, 24(SP)", "F10, 32(SP)",
"20(X10), X11", "24(X10), X11", "32(X10), F11",
"X11, 20(X10)", "X11, 24(X10)", "F11, 32(X10)",
"1(PC)", "X5, p2", "X10, 1(PC)",
"$-32, X5", "$-512, SP", "$4, SP, X10", "$63, X10",
"X9, X8", "X6, X5",
}
case arch.LOONG64:
return []string{