feat(riscv): add prologue, epilogue and frame pseudo-register support
Assisted-by: Kimi K3
This commit is contained in:
+9
-3
@@ -374,8 +374,9 @@ requires -p, the package path, and the installed Go toolchain).
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return 2
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}
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path := fs.Arg(0)
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if arch.FromFilename(path) != arch.AMD64 {
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fmt.Fprintln(os.Stderr, "gasm asm: only amd64 is supported in this Phase 2 increment")
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targetArch := arch.FromFilename(path)
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if targetArch != arch.AMD64 && targetArch != arch.RISCV {
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fmt.Fprintln(os.Stderr, "gasm asm: only amd64 and riscv64 are supported")
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return 1
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}
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src, err := readSource(path)
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@@ -391,7 +392,12 @@ requires -p, the package path, and the installed Go toolchain).
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return 1
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}
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img, err := asm.AssembleFile(f)
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var img *asm.Image
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if targetArch == arch.RISCV {
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img, err = asm.AssembleFileRISCV(f)
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} else {
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img, err = asm.AssembleFile(f)
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}
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if err != nil {
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fmt.Fprintf(os.Stderr, "%s: %v\n", path, err)
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return 1
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