feat(arch): the SVE2.1 pairwise and quadword-reduction families

Assisted-by: GLM 5.3 Flash
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petrbalvin committed 2026-10-07 20:35:41 +02:00
1 parent 31ab584eee
commit b93fccc075
5 files changed
+212 -22

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@@ -1348,41 +1348,100 @@ func TestArm64ExtStage4Golden(t *testing.T) {
name string
mnem string
form ExtForm
qual ExtQualifier
arr ExtArrangement
ops []ExtOperand
want uint32
}{
{"ZADDHNB Z22.S, Z10.S, Z8.H", "ZADDHNB", ExtFormNarrow,
{"ZADDHNB Z22.S, Z10.S, Z8.H", "ZADDHNB", ExtFormNarrow, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(22, ExtArrS), ExtVector(10, ExtArrS), ExtVector(8, ExtArrH)},
0x45b66148},
{"ZADDHNT Z22.S, Z10.S, Z8.H", "ZADDHNT", ExtFormNarrow,
{"ZADDHNT Z22.S, Z10.S, Z8.H", "ZADDHNT", ExtFormNarrow, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(22, ExtArrS), ExtVector(10, ExtArrS), ExtVector(8, ExtArrH)},
0x45b66548},
{"ZRADDHNB Z22.S, Z10.S, Z8.H", "ZRADDHNB", ExtFormNarrow,
{"ZRADDHNB Z22.S, Z10.S, Z8.H", "ZRADDHNB", ExtFormNarrow, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(22, ExtArrS), ExtVector(10, ExtArrS), ExtVector(8, ExtArrH)},
0x45b66948},
{"ZRADDHNT Z22.S, Z10.S, Z8.H", "ZRADDHNT", ExtFormNarrow,
{"ZRADDHNT Z22.S, Z10.S, Z8.H", "ZRADDHNT", ExtFormNarrow, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(22, ExtArrS), ExtVector(10, ExtArrS), ExtVector(8, ExtArrH)},
0x45b66d48},
{"ZRSUBHNB Z22.S, Z10.S, Z8.H", "ZRSUBHNB", ExtFormNarrow,
{"ZRSUBHNB Z22.S, Z10.S, Z8.H", "ZRSUBHNB", ExtFormNarrow, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(22, ExtArrS), ExtVector(10, ExtArrS), ExtVector(8, ExtArrH)},
0x45b67948},
{"ZRSUBHNT Z22.S, Z10.S, Z8.H", "ZRSUBHNT", ExtFormNarrow,
{"ZRSUBHNT Z22.S, Z10.S, Z8.H", "ZRSUBHNT", ExtFormNarrow, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(22, ExtArrS), ExtVector(10, ExtArrS), ExtVector(8, ExtArrH)},
0x45b67d48},
{"ZSUBHNB Z22.S, Z10.S, Z8.H", "ZSUBHNB", ExtFormNarrow,
{"ZSUBHNB Z22.S, Z10.S, Z8.H", "ZSUBHNB", ExtFormNarrow, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(22, ExtArrS), ExtVector(10, ExtArrS), ExtVector(8, ExtArrH)},
0x45b67148},
{"ZSUBHNT Z22.S, Z10.S, Z8.H", "ZSUBHNT", ExtFormNarrow,
{"ZSUBHNT Z22.S, Z10.S, Z8.H", "ZSUBHNT", ExtFormNarrow, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(22, ExtArrS), ExtVector(10, ExtArrS), ExtVector(8, ExtArrH)},
0x45b67548},
{"ZADDHNB Z8.H, Z10.H, Z11.B", "ZADDHNB", ExtFormNarrow,
{"ZADDHNB Z8.H, Z10.H, Z11.B", "ZADDHNB", ExtFormNarrow, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(8, ExtArrH), ExtVector(10, ExtArrH), ExtVector(11, ExtArrB)},
0x4568614b},
{"ZSUBHNT Z26.D, Z4.D, Z13.S", "ZSUBHNT", ExtFormNarrow,
{"ZSUBHNT Z26.D, Z4.D, Z13.S", "ZSUBHNT", ExtFormNarrow, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(26, ExtArrD), ExtVector(4, ExtArrD), ExtVector(13, ExtArrS)},
0x45fa748d},
// The pairwise and quadword-reduction classes.
{"ZADDP Z15.B, Z0.B, P3.M, Z0.B", "ZADDP", ExtFormZPredicatedSource, ExtQualMerging, ExtArrNone,
[]ExtOperand{ExtVector(15, ExtArrB), ExtVector(0, ExtArrB), ExtPredicate(3, ExtQualMerging), ExtVector(0, ExtArrB)},
0x4411ade0},
{"ZADDP Z9.S, Z2.S, P5.M, Z2.S", "ZADDP", ExtFormZPredicatedSource, ExtQualMerging, ExtArrNone,
[]ExtOperand{ExtVector(9, ExtArrS), ExtVector(2, ExtArrS), ExtPredicate(5, ExtQualMerging), ExtVector(2, ExtArrS)},
0x4491b522},
{"ZADDPT Z23.D, Z13.D, P1.M, Z13.D", "ZADDPT", ExtFormZPredicatedSource, ExtQualMerging, ExtArrD,
[]ExtOperand{ExtVector(23, ExtArrD), ExtVector(13, ExtArrD), ExtPredicate(1, ExtQualMerging), ExtVector(13, ExtArrD)},
0x04c406ed},
{"ZADDPT Z7.D, Z6.D, Z23.D", "ZADDPT", ExtFormVectorsZm, ExtQualNone, ExtArrD,
[]ExtOperand{ExtVector(7, ExtArrD), ExtVector(6, ExtArrD), ExtVector(23, ExtArrD)},
0x04e708d7},
// The quadword reductions, one vector per class word, the corpus
// line shared, plus a .D width the corpus line does not show.
{"ZADDQV Z25.S, P3, V5.S4", "ZADDQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x04852f25},
{"ZADDQV Z9.D, P1, V7.D2", "ZADDQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(9, ExtArrD), ExtPredicateSized(1, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 7, Arr: ExtArrD}},
0x04c52527},
{"ZANDQV Z25.S, P3, V5.S4", "ZANDQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x049e2f25},
{"ZEORQV Z25.S, P3, V5.S4", "ZEORQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x049d2f25},
{"ZORQV Z25.S, P3, V5.S4", "ZORQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x049c2f25},
{"ZSMAXQV Z25.S, P3, V5.S4", "ZSMAXQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x048c2f25},
{"ZSMINQV Z25.S, P3, V5.S4", "ZSMINQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x048e2f25},
{"ZUMAXQV Z25.S, P3, V5.S4", "ZUMAXQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x048d2f25},
{"ZUMINQV Z25.S, P3, V5.S4", "ZUMINQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x048f2f25},
{"ZFADDQV Z25.S, P3, V5.S4", "ZFADDQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x6490af25},
{"ZFMAXNMQV Z25.S, P3, V5.S4", "ZFMAXNMQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x6494af25},
{"ZFMAXQV Z25.S, P3, V5.S4", "ZFMAXQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x6496af25},
{"ZFMINNMQV Z25.S, P3, V5.S4", "ZFMINNMQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x6495af25},
{"ZFMINQV Z25.S, P3, V5.S4", "ZFMINQV", ExtFormQuadReduce, ExtQualNone, ExtArrNone,
[]ExtOperand{ExtVector(25, ExtArrS), ExtPredicateSized(3, ExtArrNone), ExtOperand{Kind: ExtVReg, Reg: 5, Arr: ExtArrS}},
0x6497af25},
} {
in := extInstructionMeta(t, tt.mnem, tt.form, ExtQualNone, ExtArrNone)
in := extInstructionMeta(t, tt.mnem, tt.form, tt.qual, tt.arr)
got, err := in.Encode(tt.ops)
if err != nil {
t.Errorf("%s: encode: %v", tt.name, err)