feat(arch): add the {1toN} broadcast to the packed amd64 memory sources
Assisted-by: GLM 5.3 Flash
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@@ -170,6 +170,11 @@ type ExtOperand struct {
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// operand (the encoder may derive the sh bit from the value).
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Shift int
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HasShift bool
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// Broadcast spells the {1toN} broadcast on an amd64 memory operand: the
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// base-relative location holds one element the hardware splats across
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// every lane of the destination, which the encoder lays down as EVEX.b.
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// Only the memory positions of the entries that carry Bcast accept it.
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Broadcast bool
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}
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// ExtVector builds a scalable vector operand, ADD Z1.S style.
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@@ -200,6 +205,14 @@ func ExtMemory(base int, disp int64) ExtOperand {
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return ExtOperand{Kind: ExtMem, Reg: base, Imm: disp}
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}
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// ExtBroadcast builds the {1toN} broadcast spelling of a base-relative memory
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// operand, the amd64 packed forms' m16bcst shape: the base is a 64-bit general
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// register number, 0..15, the displacement keeps the plain ModR/M semantics,
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// and the encoder sets EVEX.b so the single element splats across the lanes.
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func ExtBroadcast(base int, disp int64) ExtOperand {
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return ExtOperand{Kind: ExtMem, Reg: base, Imm: disp, Broadcast: true}
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}
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// ExtField is one named field of the 32-bit encoding word: a bit offset from
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// the least significant end and the field's width.
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type ExtField struct {
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@@ -467,6 +480,13 @@ type ExtInstr struct {
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// of their own, ExtFormAmdMemVec and ExtFormAmdVecMem, and need no
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// flag. The arm64 entries all carry the zero value.
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Mem int
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// Bcast records that the entry's memory position takes the {1toN}
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// broadcast beside the plain vector source, the SDM's m16bcst and
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// m32bcst spellings: one element the hardware splats across the lanes,
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// encoded as EVEX.b. The packed arithmetic carries it; the scalar
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// forms and the full-width sources do not. The arm64 entries all
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// carry the zero value.
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Bcast bool
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}
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// Encode assembles the operands into the 4 little-endian bytes of the
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