fix(asm): reject the offset on the loong64 register-indexed memory form
Assisted-by: GLM 5.3
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b54547c08d
commit
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1 file changed
+9
@@ -1422,6 +1422,11 @@ func encodeLOONG64Mov(instr *ast.Instr, mnem string, fi loong64FrameInfo, relocs
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// Register-offset addressing: MOVx (rj)(rk), rd / MOVx rd, (rj)(rk).
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// Register-offset addressing: MOVx (rj)(rk), rd / MOVx rd, (rj)(rk).
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if src.Addr.Index != "" && !isMemOperand(dst) {
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if src.Addr.Index != "" && !isMemOperand(dst) {
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if src.Addr.HasOff {
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// The toolchain rejects off(rj)(rk) with an illegal
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// combination; the offset would be silently dropped here.
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return nil, fmt.Errorf("%s: the register-indexed form takes no offset", mnem)
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}
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rd := l64Reg(dst)
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rd := l64Reg(dst)
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rj, rk := loong64RegNum(src.Addr.Base), loong64RegNum(src.Addr.Index)
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rj, rk := loong64RegNum(src.Addr.Base), loong64RegNum(src.Addr.Index)
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if rd < 0 || rj < 0 || rk < 0 {
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if rd < 0 || rj < 0 || rk < 0 {
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@@ -1434,6 +1439,10 @@ func encodeLOONG64Mov(instr *ast.Instr, mnem string, fi loong64FrameInfo, relocs
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return l64wordLE(l64rrr(op.ld, rk, rj, rd)), nil
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return l64wordLE(l64rrr(op.ld, rk, rj, rd)), nil
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}
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}
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if dst.Addr.Index != "" && !isMemOperand(src) {
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if dst.Addr.Index != "" && !isMemOperand(src) {
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if dst.Addr.HasOff {
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// The store twin of the load rejection above.
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return nil, fmt.Errorf("%s: the register-indexed form takes no offset", mnem)
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}
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rs := l64Reg(src)
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rs := l64Reg(src)
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rj, rk := loong64RegNum(dst.Addr.Base), loong64RegNum(dst.Addr.Index)
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rj, rk := loong64RegNum(dst.Addr.Base), loong64RegNum(dst.Addr.Index)
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if rs < 0 || rj < 0 || rk < 0 {
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if rs < 0 || rj < 0 || rk < 0 {
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